[Sound-open-firmware] [PATCH] mailbox: fix mailbox mappings to include exception space.

Xiuli Pan xiuli.pan at linux.intel.com
Wed Mar 21 09:38:43 CET 2018


From: Pan Xiuli <xiuli.pan at linux.intel.com>

Fix mailbox mapping on BYT, HSW, APL and CNL.

Signed-off-by: Liam Girdwood <liam.r.girdwood at linux.intel.com>
Signed-off-by: Pan Xiuli <xiuli.pan at linux.intel.com>

---
This patch need to used with patch set:

  ASoC: SOF: export snd_sof_trace_notify_for_error
  ASoC: SOF: Add SOF_IPC_REGION_EXCEPTION
  ASoC: SOF: add dsp_oops_offset for DSP panic
  ASoC: SOF: Add exception memory window support for BYT
  ASoC: SOF: Add exception memory window support for HSW
  ASoC: SOF: Add exception memory window support for BDW
  ASoC: SOF: Add exception memory window support for APL and CNL

Test with:
Mininow max rt5651 and GP-MRB nocodec and CNL nocodec
SOF 1.1-stable: ffd9093267aa8d3deeffeb09b73c8b0789ad4071
SOF-Tool 1.1-stable: cc91c73aa3e91eea35abdeb76d578b97f718feff
https://github.com/plbossart/sound/tree/topic/sof-v4.14:
4881a4bd906f8b52bebd209b88ff920005550d53
---
 src/include/uapi/ipc.h                              |  1 +
 src/platform/apollolake/include/platform/mailbox.h  | 12 ++++++------
 src/platform/apollolake/include/platform/memory.h   | 13 ++++++++++---
 src/platform/apollolake/include/platform/platform.h |  6 ++++--
 src/platform/apollolake/platform.c                  | 13 ++++++++++---
 src/platform/baytrail/include/platform/platform.h   |  5 +++--
 src/platform/baytrail/platform.c                    |  9 ++++++++-
 src/platform/cannonlake/include/platform/mailbox.h  | 12 ++++++------
 src/platform/cannonlake/include/platform/memory.h   | 12 +++++++++---
 src/platform/cannonlake/include/platform/platform.h |  6 ++++--
 src/platform/cannonlake/platform.c                  | 13 ++++++++++---
 src/platform/haswell/include/platform/platform.h    |  2 +-
 src/platform/haswell/platform.c                     |  9 ++++++++-
 13 files changed, 80 insertions(+), 33 deletions(-)

diff --git a/src/include/uapi/ipc.h b/src/include/uapi/ipc.h
index e44a13f..5ec9ec3 100644
--- a/src/include/uapi/ipc.h
+++ b/src/include/uapi/ipc.h
@@ -795,6 +795,7 @@ enum sof_ipc_region {
 	SOF_IPC_REGION_DEBUG,
 	SOF_IPC_REGION_STREAM,
 	SOF_IPC_REGION_REGS,
+	SOF_IPC_REGION_EXCEPTION,
 };
 
 struct sof_ipc_ext_data_hdr {
diff --git a/src/platform/apollolake/include/platform/mailbox.h b/src/platform/apollolake/include/platform/mailbox.h
index e04bdb5..92bd089 100644
--- a/src/platform/apollolake/include/platform/mailbox.h
+++ b/src/platform/apollolake/include/platform/mailbox.h
@@ -56,17 +56,17 @@
 #define MAILBOX_TRACE_SIZE	SRAM_TRACE_SIZE
 #define MAILBOX_TRACE_BASE	SRAM_TRACE_BASE
 
-/* window 2 debug and exception */
-#define MAILBOX_DEBUG_SIZE	(SRAM_DEBUG_SIZE -  MAILBOX_EXCEPTION_SIZE)
+/* window 2 debug, exception and stream */
+#define MAILBOX_DEBUG_SIZE	SRAM_DEBUG_SIZE
 #define MAILBOX_DEBUG_BASE	SRAM_DEBUG_BASE
 
-#define MAILBOX_EXCEPTION_SIZE	0x100
-#define MAILBOX_EXCEPTION_BASE \
-	(MAILBOX_SW_REG_BASE + SRAM_REG_FW_END)
+#define MAILBOX_EXCEPTION_SIZE	SRAM_EXCEPT_SIZE
+#define MAILBOX_EXCEPTION_BASE	SRAM_EXCEPT_BASE
+#define MAILBOX_EXCEPTION_OFFSET  SRAM_DEBUG_SIZE
 
 #define MAILBOX_STREAM_SIZE    SRAM_STREAM_SIZE
 #define MAILBOX_STREAM_BASE    SRAM_STREAM_BASE
-#define MAILBOX_STREAM_OFFSET  SRAM_DEBUG_SIZE
+#define MAILBOX_STREAM_OFFSET  (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
 
 /* window 1 inbox/downlink and FW registers */
 #define MAILBOX_HOSTBOX_SIZE	SRAM_INBOX_SIZE
diff --git a/src/platform/apollolake/include/platform/memory.h b/src/platform/apollolake/include/platform/memory.h
index a0dab04..ca3f15d 100644
--- a/src/platform/apollolake/include/platform/memory.h
+++ b/src/platform/apollolake/include/platform/memory.h
@@ -214,6 +214,8 @@
  * +---------------------+----------------+-----------------------------------+
  * | SRAM_DEBUG_BASE     | Debug data  W2 |  SRAM_DEBUG_SIZE                  |
  * +---------------------+----------------+-----------------------------------+
+ * | SRAM_EXCEPT_BASE    | Debug data  W2 |  SRAM_EXCEPT_SIZE                 |
+ * +---------------------+----------------+-----------------------------------+
  * | SRAM_STREAM_BASE    | Stream data W2 |  SRAM_STREAM_SIZE                 |
  * +---------------------+----------------+-----------------------------------+
  * | SRAM_INBOX_BASE     | Inbox  W1      |  SRAM_INBOX_SIZE                  |
@@ -236,9 +238,12 @@
 
 /* window 2 */
 #define SRAM_DEBUG_BASE		(SRAM_TRACE_BASE + SRAM_TRACE_SIZE)
-#define SRAM_DEBUG_SIZE		0x1000
+#define SRAM_DEBUG_SIZE		0x800
+
+#define SRAM_EXCEPT_BASE	(SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE)
+#define SRAM_EXCEPT_SIZE	0x800
 
-#define SRAM_STREAM_BASE	(SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE)
+#define SRAM_STREAM_BASE	(SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE)
 #define SRAM_STREAM_SIZE	0x1000
 
 /* window 1 */
@@ -263,7 +268,8 @@
 #define HP_SRAM_WIN1_BASE	SRAM_INBOX_BASE
 #define HP_SRAM_WIN1_SIZE	SRAM_INBOX_SIZE
 #define HP_SRAM_WIN2_BASE	SRAM_DEBUG_BASE
-#define HP_SRAM_WIN2_SIZE	(SRAM_DEBUG_SIZE + SRAM_STREAM_SIZE)
+#define HP_SRAM_WIN2_SIZE	(SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE + \
+				SRAM_STREAM_SIZE)
 #define HP_SRAM_WIN3_BASE	SRAM_TRACE_BASE
 #define HP_SRAM_WIN3_SIZE	SRAM_TRACE_SIZE
 
@@ -273,6 +279,7 @@
 		(HP_SRAM_SIZE - \
 		SRAM_TRACE_SIZE - \
 		SRAM_DEBUG_SIZE - \
+		SRAM_EXCEPT_SIZE - \
 		SRAM_STREAM_SIZE - \
 		SRAM_INBOX_SIZE - \
 		SRAM_OUTBOX_SIZE - \
diff --git a/src/platform/apollolake/include/platform/platform.h b/src/platform/apollolake/include/platform/platform.h
index 273bb98..a1dfba2 100644
--- a/src/platform/apollolake/include/platform/platform.h
+++ b/src/platform/apollolake/include/platform/platform.h
@@ -113,8 +113,10 @@ struct reef;
 #define PLATFORM_NUM_SSP	6
 
 /* Platform defined panic code */
-#define platform_panic(__x) \
-	sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff)
+#define platform_panic(__x) { \
+	sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \
+	ipc_write(IPC_DIPCI, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
+}
 
 /* Platform defined trace code */
 #define platform_trace_point(__x) \
diff --git a/src/platform/apollolake/platform.c b/src/platform/apollolake/platform.c
index 84f8e71..2b41028 100644
--- a/src/platform/apollolake/platform.c
+++ b/src/platform/apollolake/platform.c
@@ -68,7 +68,7 @@ static const struct sof_ipc_fw_ready ready = {
 
 #define SRAM_WINDOW_HOST_OFFSET(x)		(0x80000 + x * 0x20000)
 
-#define NUM_APL_WINDOWS		6
+#define NUM_APL_WINDOWS		7
 
 static const struct sof_ipc_window sram_window = {
 	.ext_hdr	= {
@@ -103,17 +103,24 @@ static const struct sof_ipc_window sram_window = {
 		.type	= SOF_IPC_REGION_DEBUG,
 		.id	= 2,	/* map to host window 2 */
 		.flags	= 0, // TODO: set later
-		.size	= MAILBOX_EXCEPTION_SIZE + MAILBOX_DEBUG_SIZE,
+		.size	= MAILBOX_DEBUG_SIZE,
 		.offset	= 0,
 	},
 	.window[4]	= {
+		.type	= SOF_IPC_REGION_EXCEPTION,
+		.id	= 2,	/* map to host window 2 */
+		.flags	= 0, // TODO: set later
+		.size	= MAILBOX_EXCEPTION_SIZE,
+		.offset	= MAILBOX_EXCEPTION_OFFSET,
+	},
+	.window[5]	= {
 		.type	= SOF_IPC_REGION_STREAM,
 		.id	= 2,	/* map to host window 2 */
 		.flags	= 0, // TODO: set later
 		.size	= MAILBOX_STREAM_SIZE,
 		.offset	= MAILBOX_STREAM_OFFSET,
 	},
-	.window[5]	= {
+	.window[6]	= {
 		.type	= SOF_IPC_REGION_TRACE,
 		.id	= 3,	/* map to host window 3 */
 		.flags	= 0, // TODO: set later
diff --git a/src/platform/baytrail/include/platform/platform.h b/src/platform/baytrail/include/platform/platform.h
index 036f549..9a6967b 100644
--- a/src/platform/baytrail/include/platform/platform.h
+++ b/src/platform/baytrail/include/platform/platform.h
@@ -98,9 +98,10 @@ struct reef;
 #define PLATFORM_IDLE_TIME	750000
 
 /* Platform defined panic code */
-#define platform_panic(__x) \
+#define platform_panic(__x) { \
 	shim_write(SHIM_IPCDL, (0xdead000 | (__x & 0xfff))); \
-	shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY);
+	shim_write(SHIM_IPCDH, SHIM_IPCDH_BUSY); \
+}
 
 /* Platform defined trace code */
 #define platform_trace_point(__x) \
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c
index cec8297..8fa03a7 100644
--- a/src/platform/baytrail/platform.c
+++ b/src/platform/baytrail/platform.c
@@ -70,7 +70,7 @@ static const struct sof_ipc_fw_ready ready = {
 	/* TODO: add capabilities */
 };
 
-#define NUM_BYT_WINDOWS		5
+#define NUM_BYT_WINDOWS		6
 static const struct sof_ipc_window sram_window = {
 	.ext_hdr	= {
 		.hdr.cmd = SOF_IPC_FW_READY,
@@ -114,6 +114,13 @@ static const struct sof_ipc_window sram_window = {
 		.size	= MAILBOX_STREAM_SIZE,
 		.offset	= MAILBOX_STREAM_OFFSET,
 	},
+	.window[5]	= {
+		.type	= SOF_IPC_REGION_EXCEPTION,
+		.id	= 0,	/* map to host window 0 */
+		.flags	= 0, // TODO: set later
+		.size	= MAILBOX_EXCEPTION_SIZE,
+		.offset	= MAILBOX_EXCEPTION_OFFSET,
+	},
 };
 
 static struct work_queue_timesource platform_generic_queue = {
diff --git a/src/platform/cannonlake/include/platform/mailbox.h b/src/platform/cannonlake/include/platform/mailbox.h
index c58e310..2b68bcb 100644
--- a/src/platform/cannonlake/include/platform/mailbox.h
+++ b/src/platform/cannonlake/include/platform/mailbox.h
@@ -57,17 +57,17 @@
 #define MAILBOX_TRACE_SIZE	SRAM_TRACE_SIZE
 #define MAILBOX_TRACE_BASE	SRAM_TRACE_BASE
 
-/* window 2 debug and exception */
-#define MAILBOX_DEBUG_SIZE	(SRAM_DEBUG_SIZE -  MAILBOX_EXCEPTION_SIZE)
+/* window 2 debug, exception and stream */
+#define MAILBOX_DEBUG_SIZE	SRAM_DEBUG_SIZE
 #define MAILBOX_DEBUG_BASE	SRAM_DEBUG_BASE
 
-#define MAILBOX_EXCEPTION_SIZE	0x100
-#define MAILBOX_EXCEPTION_BASE \
-	(MAILBOX_SW_REG_BASE + SRAM_REG_FW_END)
+#define MAILBOX_EXCEPTION_SIZE	SRAM_EXCEPT_SIZE
+#define MAILBOX_EXCEPTION_BASE	SRAM_EXCEPT_BASE
+#define MAILBOX_EXCEPTION_OFFSET  SRAM_DEBUG_SIZE
 
 #define MAILBOX_STREAM_SIZE    SRAM_STREAM_SIZE
 #define MAILBOX_STREAM_BASE    SRAM_STREAM_BASE
-#define MAILBOX_STREAM_OFFSET  SRAM_DEBUG_SIZE
+#define MAILBOX_STREAM_OFFSET  (SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE)
 
 /* window 1 inbox/downlink and FW registers */
 #define MAILBOX_HOSTBOX_SIZE	SRAM_INBOX_SIZE
diff --git a/src/platform/cannonlake/include/platform/memory.h b/src/platform/cannonlake/include/platform/memory.h
index fba0471..64c4bbc 100644
--- a/src/platform/cannonlake/include/platform/memory.h
+++ b/src/platform/cannonlake/include/platform/memory.h
@@ -146,6 +146,8 @@
  * +---------------------+----------------+-----------------------------------+
  * | SRAM_DEBUG_BASE     | Debug data  W2 |  SRAM_DEBUG_SIZE                  |
  * +---------------------+----------------+-----------------------------------+
+ * | SRAM_EXCEPT_BASE    | Debug data  W2 |  SRAM_EXCEPT_SIZE                 |
+ * +---------------------+----------------+-----------------------------------+
  * | SRAM_STREAM_BASE    | Stream data W2 |  SRAM_STREAM_SIZE                 |
  * +---------------------+----------------+-----------------------------------+
  * | SRAM_TRACE_BASE     | Trace Buffer W3|  SRAM_TRACE_SIZE                  |
@@ -206,9 +208,12 @@
 
 /* window 2 */
 #define SRAM_DEBUG_BASE		(SRAM_INBOX_BASE + SRAM_INBOX_SIZE)
-#define SRAM_DEBUG_SIZE		0x1000
+#define SRAM_DEBUG_SIZE		0x800
+
+#define SRAM_EXCEPT_BASE	(SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE)
+#define SRAM_EXCEPT_SIZE	0x800
 
-#define SRAM_STREAM_BASE	(SRAM_DEBUG_BASE + SRAM_DEBUG_SIZE)
+#define SRAM_STREAM_BASE	(SRAM_EXCEPT_BASE + SRAM_EXCEPT_SIZE)
 #define SRAM_STREAM_SIZE	0x1000
 
 /* window 3 */
@@ -220,7 +225,8 @@
 #define HP_SRAM_WIN1_BASE	SRAM_INBOX_BASE
 #define HP_SRAM_WIN1_SIZE	SRAM_INBOX_SIZE
 #define HP_SRAM_WIN2_BASE	SRAM_DEBUG_BASE
-#define HP_SRAM_WIN2_SIZE	(SRAM_DEBUG_SIZE + SRAM_STREAM_SIZE)
+#define HP_SRAM_WIN2_SIZE	(SRAM_DEBUG_SIZE + SRAM_EXCEPT_SIZE + \
+				SRAM_STREAM_SIZE)
 #define HP_SRAM_WIN3_BASE	SRAM_TRACE_BASE
 #define HP_SRAM_WIN3_SIZE	SRAM_TRACE_SIZE
 
diff --git a/src/platform/cannonlake/include/platform/platform.h b/src/platform/cannonlake/include/platform/platform.h
index c91c583..b007e8a 100644
--- a/src/platform/cannonlake/include/platform/platform.h
+++ b/src/platform/cannonlake/include/platform/platform.h
@@ -108,8 +108,10 @@ struct reef;
 #define PLATFORM_IDLE_TIME	750000
 
 /* Platform defined trace code */
-#define platform_panic(__x) \
-	sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff)
+#define platform_panic(__x) { \
+	sw_reg_write(SRAM_REG_FW_STATUS, (0xdead000 | __x) & 0x3fffffff); \
+	ipc_write(IPC_DIPCIDR, 0x80000000 | ((0xdead000 | __x) & 0x3fffffff)); \
+}
 
 /* Platform defined trace code */
 #define platform_trace_point(__x) \
diff --git a/src/platform/cannonlake/platform.c b/src/platform/cannonlake/platform.c
index 68ebcb3..1f1fd2f 100644
--- a/src/platform/cannonlake/platform.c
+++ b/src/platform/cannonlake/platform.c
@@ -70,7 +70,7 @@ static const struct sof_ipc_fw_ready ready = {
 
 #define SRAM_WINDOW_HOST_OFFSET(x)	(0x80000 + x * 0x20000)
 
-#define NUM_CNL_WINDOWS		6
+#define NUM_CNL_WINDOWS		7
 
 static const struct sof_ipc_window sram_window = {
 	.ext_hdr	= {
@@ -105,17 +105,24 @@ static const struct sof_ipc_window sram_window = {
 		.type	= SOF_IPC_REGION_DEBUG,
 		.id	= 2,	/* map to host window 2 */
 		.flags	= 0, // TODO: set later
-		.size	= MAILBOX_EXCEPTION_SIZE + MAILBOX_DEBUG_SIZE,
+		.size	= MAILBOX_DEBUG_SIZE,
 		.offset	= 0,
 	},
 	.window[4]	= {
+		.type	= SOF_IPC_REGION_EXCEPTION,
+		.id	= 2,	/* map to host window 2 */
+		.flags	= 0, // TODO: set later
+		.size	= MAILBOX_EXCEPTION_SIZE,
+		.offset	= MAILBOX_EXCEPTION_OFFSET,
+	},
+	.window[5]	= {
 		.type	= SOF_IPC_REGION_STREAM,
 		.id	= 2,	/* map to host window 2 */
 		.flags	= 0, // TODO: set later
 		.size	= MAILBOX_STREAM_SIZE,
 		.offset	= MAILBOX_STREAM_OFFSET,
 	},
-	.window[5]	= {
+	.window[6]	= {
 		.type	= SOF_IPC_REGION_TRACE,
 		.id	= 3,	/* map to host window 3 */
 		.flags	= 0, // TODO: set later
diff --git a/src/platform/haswell/include/platform/platform.h b/src/platform/haswell/include/platform/platform.h
index 94c4bc2..a9efe8a 100644
--- a/src/platform/haswell/include/platform/platform.h
+++ b/src/platform/haswell/include/platform/platform.h
@@ -98,7 +98,7 @@ struct reef;
 
 /* Platform defined panic code */
 #define platform_panic(__x) \
-	shim_write(SHIM_IPCD, (0xdead000 | __x) & 0x3fffffff)
+	shim_write(SHIM_IPCD, (SHIM_IPCD_BUSY | 0xdead000 | __x))
 
 /* Platform defined trace code */
 #define platform_trace_point(__x) \
diff --git a/src/platform/haswell/platform.c b/src/platform/haswell/platform.c
index f84d6e3..e9270ac 100644
--- a/src/platform/haswell/platform.c
+++ b/src/platform/haswell/platform.c
@@ -69,7 +69,7 @@ static const struct sof_ipc_fw_ready ready = {
 	/* TODO: add capabilities */
 };
 
-#define NUM_HSW_WINDOWS		5
+#define NUM_HSW_WINDOWS		6
 static const struct sof_ipc_window sram_window = {
 	.ext_hdr	= {
 		.hdr.cmd = SOF_IPC_FW_READY,
@@ -113,6 +113,13 @@ static const struct sof_ipc_window sram_window = {
 		.size	= MAILBOX_STREAM_SIZE,
 		.offset	= MAILBOX_STREAM_OFFSET,
 	},
+	.window[5]	= {
+		.type	= SOF_IPC_REGION_EXCEPTION,
+		.id	= 0,	/* map to host window 0 */
+		.flags	= 0, // TODO: set later
+		.size	= MAILBOX_EXCEPTION_SIZE,
+		.offset	= MAILBOX_EXCEPTION_OFFSET,
+	},
 };
 
 static struct work_queue_timesource platform_generic_queue = {
-- 
2.7.4



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