[Sound-open-firmware] [PATCH 1/3] clk: fix ApolloLake SSP clock values

[Keyon Jie]

On 2018年03月07日 08:07, Pierre-Louis Bossart wrote:
> 24.576, not 24.0 MHz
> 
> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
> ---
>   src/platform/apollolake/clk.c | 3 +--
>   1 file changed, 1 insertion(+), 2 deletions(-)
> 
> diff --git a/src/platform/apollolake/clk.c b/src/platform/apollolake/clk.c
> index 32d3236..555caae 100644
> --- a/src/platform/apollolake/clk.c
> +++ b/src/platform/apollolake/clk.c
> @@ -72,11 +72,10 @@ static const struct freq_table cpu_freq[] = {
>   
>   /*
>    * XTAL clock, used as Wall Clock(external timer),
> - * 19.2M for Atom and 24M for core
>    */
>   static const struct freq_table ssp_freq[] = {
>   	{19200000, 19,},	/* default */
> -	{24000000, 24,},
> +	{24576000, 24,},

I am not sure if this is correct. For historical reason, here we use it 
for work queue timer but not SSP related actually, detail to APL, it is 
the frequency of Wall Clock, I verified it is 19.2M for Atom(e.g. GPMRB) 
and heard from Seppo that it is 24M on core(I haven't verified it yet).

Thanks,
~Keyon

>   };
>   
>   #define CPU_DEFAULT_IDX		2
>