[Sound-open-firmware] [PATCH v3 2/6] dma: update platform DMAC definitions with capabilities
Liam Girdwood
liam.r.girdwood at linux.intel.com
Sun Jun 10 21:51:21 CEST 2018
On Fri, 2018-06-08 at 15:18 -0700, Ranjani Sridharan wrote:
> This patch defines the DMA copy capabilities bitmasks that
> will be used to define platform DMAC's.
>
> It also adds a new dma_cap member to the dma structure and
> updates all platform DMAC definitions to include the capabilities
> supported.
>
> Signed-off-by: Ranjani Sridharan <ranjani.sridharan at linux.intel.com>
> ---
> src/include/sof/dma.h | 18 +++++++++++++++++-
> src/platform/apollolake/dma.c | 12 +++++++++++-
> src/platform/apollolake/include/platform/dma.h | 5 +++++
> src/platform/baytrail/dma.c | 17 ++++++++++++++++-
> src/platform/baytrail/include/platform/dma.h | 9 +++++++++
> src/platform/cannonlake/dma.c | 12 +++++++++++-
> src/platform/cannonlake/include/platform/dma.h | 6 ++++++
> src/platform/haswell/dma.c | 9 ++++++++-
> src/platform/haswell/include/platform/dma.h | 5 +++++
> 9 files changed, 88 insertions(+), 5 deletions(-)
>
> diff --git a/src/include/sof/dma.h b/src/include/sof/dma.h
> index af15d14..4bc178e 100644
> --- a/src/include/sof/dma.h
> +++ b/src/include/sof/dma.h
> @@ -48,6 +48,21 @@ enum dma_copy_dir {
> DMA_DIR_DEV_TO_DEV,
> };
>
> +
> +/* DMA capabilities bitmasks used to define DMA copy direction */
> +#define DMA_CAP_MEM_TO_MEM (1 << 0)
> +#define DMA_CAP_HMEM_TO_LMEM (1 << 1)
> +#define DMA_CAP_LMEM_TO_HMEM (1 << 2)
> +#define DMA_CAP_MEM_TO_DEV (1 << 3)
> +#define DMA_CAP_DEV_TO_MEM (1 << 4)
> +#define DMA_CAP_DEV_TO_DEV (1 << 5)
> +
> +/* DMA capabilities bitmasks used to define the type of DMA */
> +#define DMA_CAP_GP_LP (1 << 6)
> +#define DMA_CAP_GP_HP (1 << 7)
> +#define DMA_CAP_HDA_HOST (1 << 8)
> +#define DMA_CAP_HDA_LINK (1 << 9)
> +
Thinking more, it may be better to have :-
#define DMA_CAP_HDA
#define DMA_CAP_SSP
#define DMA_CAP_DMIC
These can be used in conjunction with the other caps when requesting a DMAC
since HDA_HOST and HDA_LINK is very Intel specific.
> /* DMA IRQ types */
> #define DMA_IRQ_TYPE_BLOCK (1 << 0)
> #define DMA_IRQ_TYPE_LLIST (1 << 1)
> @@ -118,6 +133,7 @@ struct dma_ops {
> /* DMA platform data */
> struct dma_plat_data {
> uint32_t id;
> + uint32_t dma_cap;
lets just call this caps (since dma is implied already)
> uint32_t base;
> uint32_t channels;
> uint32_t irq;
> @@ -138,7 +154,7 @@ struct dma_int {
> uint32_t irq;
> };
>
> -struct dma *dma_get(int dmac_id);
> +struct dma *dma_get(uint32_t dma_cap, uint32_t flags);
>
> /* initialize all platform DMAC's */
> int dmac_init(void);
> diff --git a/src/platform/apollolake/dma.c b/src/platform/apollolake/dma.c
> index 39cde9e..9790ed8 100644
> --- a/src/platform/apollolake/dma.c
> +++ b/src/platform/apollolake/dma.c
> @@ -108,10 +108,13 @@ static struct dw_drv_plat_data dmac1 = {
> },
> };
>
> -static struct dma dma[] = {
> +struct dma dma[PLATFORM_NUM_DMACS] = {
> { /* Low Power GP DMAC 0 */
> .plat_data = {
> .id = DMA_GP_LP_DMAC0,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_MEM_TO_MEM |
> + DMA_CAP_MEM_TO_DEV | DMA_CAP_DEV_TO_MEM |
> + DMA_CAP_DEV_TO_DEV,
> .base = LP_GP_DMA_BASE(0),
> .channels = 8,
> .irq = IRQ_EXT_LP_GPDMA0_LVL5(0, 0),
> @@ -122,6 +125,9 @@ static struct dma dma[] = {
> { /* Low Power GP DMAC 1 */
> .plat_data = {
> .id = DMA_GP_LP_DMAC1,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_MEM_TO_MEM |
> + DMA_CAP_MEM_TO_DEV | DMA_CAP_DEV_TO_MEM |
> + DMA_CAP_DEV_TO_DEV,
> .base = LP_GP_DMA_BASE(1),
> .channels = 8,
> .irq = IRQ_EXT_LP_GPDMA1_LVL5(0, 0),
> @@ -132,6 +138,7 @@ static struct dma dma[] = {
> { /* Host In DMAC */
> .plat_data = {
> .id = DMA_HOST_IN_DMAC,
> + .dma_cap = DMA_CAP_HDA_HOST | DMA_CAP_LMEM_TO_HMEM,
> .base = GTW_HOST_IN_STREAM_BASE(0),
> .channels = 7,
> .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0),
> @@ -142,6 +149,7 @@ static struct dma dma[] = {
> { /* Host out DMAC */
> .plat_data = {
> .id = DMA_HOST_OUT_DMAC,
> + .dma_cap = DMA_CAP_HDA_HOST | DMA_CAP_HMEM_TO_LMEM,
> .base = GTW_HOST_OUT_STREAM_BASE(0),
> .channels = 6,
> .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0),
> @@ -152,6 +160,7 @@ static struct dma dma[] = {
> { /* Link In DMAC */
> .plat_data = {
> .id = DMA_LINK_IN_DMAC,
> + .dma_cap = DMA_CAP_HDA_LINK | DMA_CAP_MEM_TO_DEV,
> .base = GTW_LINK_IN_STREAM_BASE(0),
> .channels = 8,
> .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0),
> @@ -162,6 +171,7 @@ static struct dma dma[] = {
> { /* Link out DMAC */
> .plat_data = {
> .id = DMA_LINK_OUT_DMAC,
> + .dma_cap = DMA_CAP_HDA_LINK | DMA_CAP_DEV_TO_MEM,
> .base = GTW_LINK_OUT_STREAM_BASE(0),
> .channels = 8,
> .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0),
> diff --git a/src/platform/apollolake/include/platform/dma.h
> b/src/platform/apollolake/include/platform/dma.h
> index 916a455..7243c03 100644
> --- a/src/platform/apollolake/include/platform/dma.h
> +++ b/src/platform/apollolake/include/platform/dma.h
> @@ -35,6 +35,9 @@
> #include <stdint.h>
> #include <sof/io.h>
> #include <arch/cache.h>
> +#include <sof/dma.h>
> +
> +#define PLATFORM_NUM_DMACS 6
>
> /* available DMACs */
> #define DMA_GP_LP_DMAC0 0
> @@ -72,4 +75,6 @@
> #define DMA_HANDSHAKE_SSP5_TX 12
> #define DMA_HANDSHAKE_SSP5_RX 13
>
> +extern struct dma dma[PLATFORM_NUM_DMACS];
> +
> #endif
> diff --git a/src/platform/baytrail/dma.c b/src/platform/baytrail/dma.c
> index 1e84402..04ed41a 100644
> --- a/src/platform/baytrail/dma.c
> +++ b/src/platform/baytrail/dma.c
> @@ -143,10 +143,15 @@ static struct dw_drv_plat_data dmac2 = {
> };
> #endif
>
> -static struct dma dma[] = {
> +struct dma dma[] = {
> {
> .plat_data = {
> .id = DMA_ID_DMAC0,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_GP_HP |
BYT has only HP DMACs
> + DMA_CAP_HDA_HOST | DMA_CAP_HDA_LINK |
> + DMA_CAP_MEM_TO_MEM | DMA_CAP_HMEM_TO_LMEM |
> + DMA_CAP_LMEM_TO_HMEM | DMA_CAP_MEM_TO_DEV |
> + DMA_CAP_DEV_TO_MEM | DMA_CAP_DEV_TO_DEV,
> .base = DMA0_BASE,
> .irq = IRQ_NUM_EXT_DMAC0,
> .drv_plat_data = &dmac0,
> @@ -156,6 +161,11 @@ static struct dma dma[] = {
> {
> .plat_data = {
> .id = DMA_ID_DMAC1,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_GP_HP |
> + DMA_CAP_HDA_HOST | DMA_CAP_HDA_LINK |
> + DMA_CAP_MEM_TO_MEM | DMA_CAP_HMEM_TO_LMEM |
> + DMA_CAP_LMEM_TO_HMEM | DMA_CAP_MEM_TO_DEV |
> + DMA_CAP_DEV_TO_MEM | DMA_CAP_DEV_TO_DEV,
> .base = DMA1_BASE,
> .irq = IRQ_NUM_EXT_DMAC1,
> .drv_plat_data = &dmac1,
> @@ -166,6 +176,11 @@ static struct dma dma[] = {
> {
> .plat_data = {
> .id = DMA_ID_DMAC2,
> + .dmac_cap = DMA_CAP_GP_LP | DMA_CAP_GP_HP |
> + DMA_CAP_HDA_HOST | DMA_CAP_HDA_LINK |
> + DMA_CAP_MEM_TO_MEM | DMA_CAP_HMEM_TO_LMEM |
> + DMA_CAP_LMEM_TO_HMEM | DMA_CAP_MEM_TO_DEV |
> + DMA_CAP_DEV_TO_MEM | DMA_CAP_DEV_TO_DEV,
> .base = DMA2_BASE,
> .irq = IRQ_NUM_EXT_DMAC2,
> .drv_plat_data = &dmac2,
> diff --git a/src/platform/baytrail/include/platform/dma.h
> b/src/platform/baytrail/include/platform/dma.h
> index eec501a..5084dad 100644
> --- a/src/platform/baytrail/include/platform/dma.h
> +++ b/src/platform/baytrail/include/platform/dma.h
> @@ -33,6 +33,13 @@
> #define __PLATFORM_DMA_H__
>
> #include <stdint.h>
> +#include <sof/dma.h>
> +
> +#if defined CONFIG_CHERRYTRAIL
> +#define PLATFORM_NUM_DMACS 3
> +#else
> +#define PLATFORM_NUM_DMACS 2
> +#endif
>
> #define DMA_ID_DMAC0 0
> #define DMA_ID_DMAC1 1
> @@ -53,4 +60,6 @@
> #define DMA_HANDSHAKE_SSP6_RX 12
> #define DMA_HANDSHAKE_SSP6_TX 13
>
> +extern struct dma dma[PLATFORM_NUM_DMACS];
> +
> #endif
> diff --git a/src/platform/cannonlake/dma.c b/src/platform/cannonlake/dma.c
> index e8d0938..eadc475 100644
> --- a/src/platform/cannonlake/dma.c
> +++ b/src/platform/cannonlake/dma.c
> @@ -109,10 +109,13 @@ static struct dw_drv_plat_data dmac1 = {
> },
> };
>
> -static struct dma dma[] = {
> +struct dma dma[] = {
> { /* Low Power GP DMAC 0 */
> .plat_data = {
> .id = DMA_GP_LP_DMAC0,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_MEM_TO_MEM |
> + DMA_CAP_MEM_TO_DEV | DMA_CAP_DEV_TO_MEM |
> + DMA_CAP_DEV_TO_DEV,
> .base = LP_GP_DMA_BASE(0),
> .channels = 8,
> .irq = IRQ_EXT_LP_GPDMA0_LVL5(0, 0),
> @@ -123,6 +126,9 @@ static struct dma dma[] = {
> { /* Low Power GP DMAC 1 */
> .plat_data = {
> .id = DMA_GP_LP_DMAC1,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_MEM_TO_MEM |
> + DMA_CAP_MEM_TO_DEV | DMA_CAP_DEV_TO_MEM |
> + DMA_CAP_DEV_TO_DEV,
> .base = LP_GP_DMA_BASE(1),
> .channels = 8,
> .irq = IRQ_EXT_LP_GPDMA1_LVL5(0, 0),
> @@ -133,6 +139,7 @@ static struct dma dma[] = {
> { /* Host In DMAC */
> .plat_data = {
> .id = DMA_HOST_IN_DMAC,
> + .dma_cap = DMA_CAP_HDA_HOST | DMA_CAP_LMEM_TO_HMEM,
> .base = GTW_HOST_IN_STREAM_BASE(0),
> .channels = 7,
> .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0),
> @@ -143,6 +150,7 @@ static struct dma dma[] = {
> { /* Host out DMAC */
> .plat_data = {
> .id = DMA_HOST_OUT_DMAC,
> + .dma_cap = DMA_CAP_HDA_HOST | DMA_CAP_HMEM_TO_LMEM,
> .base = GTW_HOST_OUT_STREAM_BASE(0),
> .channels = 9,
> .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0),
> @@ -153,6 +161,7 @@ static struct dma dma[] = {
> { /* Link In DMAC */
> .plat_data = {
> .id = DMA_LINK_IN_DMAC,
> + .dma_cap = DMA_CAP_HDA_LINK | DMA_CAP_MEM_TO_DEV,
> .base = GTW_LINK_IN_STREAM_BASE(0),
> .channels = 9,
> .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0),
> @@ -163,6 +172,7 @@ static struct dma dma[] = {
> { /* Link out DMAC */
> .plat_data = {
> .id = DMA_LINK_OUT_DMAC,
> + .dma_cap = DMA_CAP_HDA_LINK | DMA_CAP_DEV_TO_MEM,
> .base = GTW_LINK_OUT_STREAM_BASE(0),
> .channels = 7,
> .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0),
> diff --git a/src/platform/cannonlake/include/platform/dma.h
> b/src/platform/cannonlake/include/platform/dma.h
> index 00dcda8..b6366a0 100644
> --- a/src/platform/cannonlake/include/platform/dma.h
> +++ b/src/platform/cannonlake/include/platform/dma.h
> @@ -33,6 +33,10 @@
> #ifndef __PLATFORM_DMA_H__
> #define __PLATFORM_DMA_H__
>
> +#include <sof/dma.h>
> +
> +#define PLATFORM_NUM_DMACS 6
> +
> /* available DMACs */
> #define DMA_GP_LP_DMAC0 0
> #define DMA_GP_LP_DMAC1 1
> @@ -69,4 +73,6 @@
> #define DMA_HANDSHAKE_SSP5_TX 12
> #define DMA_HANDSHAKE_SSP5_RX 13
>
> +extern struct dma dma[PLATFORM_NUM_DMACS];
> +
> #endif
> diff --git a/src/platform/haswell/dma.c b/src/platform/haswell/dma.c
> index 5beb086..35c88be 100644
> --- a/src/platform/haswell/dma.c
> +++ b/src/platform/haswell/dma.c
> @@ -106,10 +106,12 @@ static struct dw_drv_plat_data dmac1 = {
> },
> };
>
> -static struct dma dma[] = {
> +struct dma dma[] = {
> {
> .plat_data = {
> .base = DMA0_BASE,
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_GP_HP |
> + DMA_CAP_MEM_TO_MEM,
> .irq = IRQ_NUM_EXT_DMAC0,
> .drv_plat_data = &dmac0,
> },
> @@ -117,6 +119,11 @@ static struct dma dma[] = {
> },
> {
> .plat_data = {
> + .dma_cap = DMA_CAP_GP_LP | DMA_CAP_GP_HP |
> + DMA_CAP_HDA_HOST | DMA_CAP_HDA_LINK |
> + DMA_CAP_MEM_TO_MEM | DMA_CAP_HMEM_TO_LMEM |
> + DMA_CAP_LMEM_TO_HMEM | DMA_CAP_MEM_TO_DEV |
> + DMA_CAP_DEV_TO_MEM | DMA_CAP_DEV_TO_DEV,
> .base = DMA1_BASE,
> .irq = IRQ_NUM_EXT_DMAC1,
> .drv_plat_data = &dmac1,
> diff --git a/src/platform/haswell/include/platform/dma.h
> b/src/platform/haswell/include/platform/dma.h
> index 4780f92..e9c38e6 100644
> --- a/src/platform/haswell/include/platform/dma.h
> +++ b/src/platform/haswell/include/platform/dma.h
> @@ -32,6 +32,9 @@
> #define __PLATFORM_DMA_H__
>
> #include <stdint.h>
> +#include <sof/dma.h>
> +
> +#define PLATFORM_NUM_DMACS 2
>
> #define DMA_ID_DMAC0 0
> #define DMA_ID_DMAC1 1
> @@ -53,4 +56,6 @@
> #define DMA_HANDSHAKE_OBFF_10 14
> #define DMA_HANDSHAKE_OBFF_11 15
>
> +extern struct dma dma[PLATFORM_NUM_DMACS];
> +
> #endif
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