[Sound-open-firmware] [RFC PATCH v2 2/8] dma: define platform DMAC capabilities
Ranjani Sridharan
ranjani.sridharan at linux.intel.com
Thu Jun 7 18:34:47 CEST 2018
On Thu, 2018-06-07 at 12:46 +0100, Liam Girdwood wrote:
> On Wed, 2018-06-06 at 16:08 -0700, Ranjani Sridharan wrote:
> > Add the link_to_mem and mem_to_link dma copy directions
> > to the dma_copy_dir enum.
> >
> > And define the DMAC copy capabilities for all platform DMAC's
> >
> > Signed-off-by: Ranjani Sridharan <ranjani.sridharan at linux.intel.com
> > >
> > ---
> > src/include/sof/dma.h | 10 +++++++++-
> > src/platform/apollolake/dma.c | 10 ++++++++++
> > src/platform/baytrail/dma.c | 3 +++
> > src/platform/cannonlake/dma.c | 9 +++++++++
> > src/platform/haswell/dma.c | 2 ++
> > 5 files changed, 33 insertions(+), 1 deletion(-)
> >
> > diff --git a/src/include/sof/dma.h b/src/include/sof/dma.h
> > index 80ca880..142aafc 100644
> > --- a/src/include/sof/dma.h
> > +++ b/src/include/sof/dma.h
> > @@ -46,13 +46,20 @@ enum dma_copy_dir {
> > DMA_DIR_MEM_TO_DEV,
> > DMA_DIR_DEV_TO_MEM,
> > DMA_DIR_DEV_TO_DEV,
> > + DMA_DIR_MEM_TO_LINK,
>
> The should be the same as MEM_TO_DEV ?
The intention for adding this was to distinguish between Link DMA and
GP DMA.
As I understand GP DMA is used for MEM_TO_DEV ot DEV_TO_MEM for
SSP/DMIC's. If MEM_TO_LINK is the same as MEM_TO_DEV, could you please
give me a suggestion on how else to differentiate the Link DMA from GP
DMA?
>
> > + DMA_DIR_LINK_TO_MEM,
>
> DEV_TO_MEM
>
> Probably good to define a bit mask of all DMAC capabilities, this
> would include
> permitted directions.
> > };
> >
> > +/*
> > + * DMAC copy capabilities with support for all directions
> > + * enumerated by dma_copy_dir
> > + */
> > +#define DMA_COPY_CAPS_ALL 0xFF
> > +
>
> We cant mix an enum with a bitmask.
>
> > /* DMA IRQ types */
> > #define DMA_IRQ_TYPE_BLOCK (1 << 0)
> > #define DMA_IRQ_TYPE_LLIST (1 << 1)
> >
> > -
> > /* We will use this macro in cb handler to inform dma that
> > * we need to stop the reload for special purpose
> > */
> > @@ -118,6 +125,7 @@ struct dma_ops {
> > /* DMA platform data */
> > struct dma_plat_data {
> > uint32_t id;
> > + int dma_cap; /* copy capabilities supported by DMAC*/
>
> bitmask should be unsigned
>
> > uint32_t base;
> > uint32_t channels;
> > uint32_t irq;
> > diff --git a/src/platform/apollolake/dma.c
> > b/src/platform/apollolake/dma.c
> > index da413e3..f5e492c 100644
> > --- a/src/platform/apollolake/dma.c
> > +++ b/src/platform/apollolake/dma.c
> > @@ -38,6 +38,9 @@
> > #include <stdint.h>
> > #include <string.h>
> >
> > +/* DMAC copy caps for GP LP DMA's*/
> > +#define DMA_GP_LP_CAPS 0x39
> > +
>
> Magic number 0x39 ?
>
> > static struct dw_drv_plat_data dmac0 = {
> > .chan[0] = {
> > .class = 1,
> > @@ -112,6 +115,7 @@ static struct dma dma[] = {
> > { /* Low Power GP DMAC 0 */
> > .plat_data = {
> > .id = DMA_GP_LP_DMAC0,
> > + .dma_cap = DMA_GP_LP_CAPS,
>
> I'd expect to see caps like DMA_CAPS_LP | DMA_CAPS_MEM_TO_DEV |
> DMA_CAPS_DMIC
> etc,
>
> > .base = LP_GP_DMA_BASE(0),
> > .channels = 8,
> > .irq = IRQ_EXT_LP_GPDMA0_LVL5(0,
> > 0),
> > @@ -122,6 +126,8 @@ static struct dma dma[] = {
> > { /* Low Power GP DMAC 1 */
> > .plat_data = {
> > .id = DMA_GP_LP_DMAC1,
> > + .dma_cap = DMA_GP_LP_CAPS,
> > + .dma_cap = (1 << DMA_DIR_LMEM_TO_HMEM),
> > .base = LP_GP_DMA_BASE(1),
> > .channels = 8,
> > .irq = IRQ_EXT_LP_GPDMA1_LVL5(0,
> > 0),
> > @@ -132,6 +138,7 @@ static struct dma dma[] = {
> > { /* Host In DMAC */
> > .plat_data = {
> > .id = DMA_HOST_IN_DMAC,
> > + .dma_cap = (1 << DMA_DIR_LMEM_TO_HMEM),
> > .base = GTW_HOST_IN_STREAM_BASE(0),
> > .channels = 7,
> > .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0,
> > 0),
> > @@ -142,6 +149,7 @@ static struct dma dma[] = {
> > { /* Host out DMAC */
> > .plat_data = {
> > .id = DMA_HOST_OUT_DMAC,
> > + .dma_cap = (1 << DMA_DIR_HMEM_TO_LMEM),
> > .base =
> > GTW_HOST_OUT_STREAM_BASE(0),
> > .channels = 6,
> > .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0,
> > 0),
> > @@ -152,6 +160,7 @@ static struct dma dma[] = {
> > { /* Link In DMAC */
> > .plat_data = {
> > .id = DMA_LINK_IN_DMAC,
> > + .dma_cap = (1 << DMA_DIR_MEM_TO_LINK),
> > .base = GTW_LINK_IN_STREAM_BASE(0),
> > .channels = 8,
> > .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0,
> > 0),
> > @@ -162,6 +171,7 @@ static struct dma dma[] = {
> > { /* Link out DMAC */
> > .plat_data = {
> > .id = DMA_LINK_OUT_DMAC,
> > + .dma_cap = (1 << DMA_DIR_LINK_TO_MEM),
> > .base =
> > GTW_LINK_OUT_STREAM_BASE(0),
> > .channels = 8,
> > .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0,
> > 0),
> > diff --git a/src/platform/baytrail/dma.c
> > b/src/platform/baytrail/dma.c
> > index 142b62a..95b836c 100644
> > --- a/src/platform/baytrail/dma.c
> > +++ b/src/platform/baytrail/dma.c
> > @@ -147,6 +147,7 @@ static struct dma dma[] = {
> > {
> > .plat_data = {
> > .id = DMA_ID_DMAC0,
> > + .dma_cap = DMA_COPY_CAPS_ALL,
> > .base = DMA0_BASE,
> > .irq = IRQ_NUM_EXT_DMAC0,
> > .drv_plat_data = &dmac0,
> > @@ -156,6 +157,7 @@ static struct dma dma[] = {
> > {
> > .plat_data = {
> > .id = DMA_ID_DMAC1,
> > + .dma_cap = DMA_COPY_CAPS_ALL,
> > .base = DMA1_BASE,
> > .irq = IRQ_NUM_EXT_DMAC1,
> > .drv_plat_data = &dmac1,
> > @@ -166,6 +168,7 @@ static struct dma dma[] = {
> > {
> > .plat_data = {
> > .id = DMA_ID_DMAC2,
> > + .dma_cap = DMA_COPY_CAPS_ALL,
> > .base = DMA2_BASE,
> > .irq = IRQ_NUM_EXT_DMAC2,
> > .drv_plat_data = &dmac2,
> > diff --git a/src/platform/cannonlake/dma.c
> > b/src/platform/cannonlake/dma.c
> > index 1d08a1f..1ad989f 100644
> > --- a/src/platform/cannonlake/dma.c
> > +++ b/src/platform/cannonlake/dma.c
> > @@ -39,6 +39,9 @@
> > #include <stdint.h>
> > #include <string.h>
> >
> > +/* DMAC copy caps for GP LP DMA's*/
> > +#define DMA_GP_LP_CAPS 0x39
> > +
> > static struct dw_drv_plat_data dmac0 = {
> > .chan[0] = {
> > .class = 6,
> > @@ -113,6 +116,7 @@ static struct dma dma[] = {
> > { /* Low Power GP DMAC 0 */
> > .plat_data = {
> > .id = DMA_GP_LP_DMAC0,
> > + .dma_cap = DMA_GP_LP_CAPS,
> > .base = LP_GP_DMA_BASE(0),
> > .channels = 8,
> > .irq = IRQ_EXT_LP_GPDMA0_LVL5(0, 0),
> > @@ -123,6 +127,7 @@ static struct dma dma[] = {
> > { /* Low Power GP DMAC 1 */
> > .plat_data = {
> > .id = DMA_GP_LP_DMAC1,
> > + .dma_cap = DMA_GP_LP_CAPS,
> > .base = LP_GP_DMA_BASE(1),
> > .channels = 8,
> > .irq = IRQ_EXT_LP_GPDMA1_LVL5(0, 0),
> > @@ -133,6 +138,7 @@ static struct dma dma[] = {
> > { /* Host In DMAC */
> > .plat_data = {
> > .id = DMA_HOST_IN_DMAC,
> > + .dma_cap = (1 << DMA_DIR_LMEM_TO_HMEM),
> > .base = GTW_HOST_IN_STREAM_BASE(0),
> > .channels = 7,
> > .irq = IRQ_EXT_HOST_DMA_IN_LVL3(0, 0),
> > @@ -143,6 +149,7 @@ static struct dma dma[] = {
> > { /* Host out DMAC */
> > .plat_data = {
> > .id = DMA_HOST_OUT_DMAC,
> > + .dma_cap = (1 << DMA_DIR_HMEM_TO_LMEM),
> > .base =
> > GTW_HOST_OUT_STREAM_BASE(0),
> > .channels = 9,
> > .irq = IRQ_EXT_HOST_DMA_OUT_LVL3(0, 0),
> > @@ -153,6 +160,7 @@ static struct dma dma[] = {
> > { /* Link In DMAC */
> > .plat_data = {
> > .id = DMA_LINK_IN_DMAC,
> > + .dma_cap = (1 << DMA_DIR_MEM_TO_LINK),
> > .base = GTW_LINK_IN_STREAM_BASE(0),
> > .channels = 9,
> > .irq = IRQ_EXT_LINK_DMA_IN_LVL4(0, 0),
> > @@ -163,6 +171,7 @@ static struct dma dma[] = {
> > { /* Link out DMAC */
> > .plat_data = {
> > .id = DMA_LINK_OUT_DMAC,
> > + .dma_cap = (1 << DMA_DIR_LINK_TO_MEM),
> > .base =
> > GTW_LINK_OUT_STREAM_BASE(0),
> > .channels = 7,
> > .irq = IRQ_EXT_LINK_DMA_OUT_LVL4(0, 0),
> > diff --git a/src/platform/haswell/dma.c
> > b/src/platform/haswell/dma.c
> > index 1bd424e..ec48bc8 100644
> > --- a/src/platform/haswell/dma.c
> > +++ b/src/platform/haswell/dma.c
> > @@ -110,6 +110,7 @@ static struct dma dma[] = {
> > {
> > .plat_data = {
> > .base = DMA0_BASE,
> > + .dma_cap = (1 << DMA_DIR_MEM_TO_MEM),
> > .irq = IRQ_NUM_EXT_DMAC0,
> > .drv_plat_data = &dmac0,
> > },
> > @@ -118,6 +119,7 @@ static struct dma dma[] = {
> > {
> > .plat_data = {
> > .base = DMA1_BASE,
> > + .dma_cap = DMA_COPY_CAPS_ALL,
> > .irq = IRQ_NUM_EXT_DMAC1,
> > .drv_plat_data = &dmac1,
> > },
>
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