[Sound-open-firmware] CNL/APL alignment

Jie, Yang yang.jie at intel.com
Wed Feb 21 12:18:25 CET 2018


>-----Original Message-----
>From: sound-open-firmware-bounces at alsa-project.org [mailto:sound-open-
>firmware-bounces at alsa-project.org] On Behalf Of Pierre-Louis Bossart
>Sent: Wednesday, February 21, 2018 3:34 AM
>To: sound-open-firmware at alsa-project.org
>Subject: [Sound-open-firmware] CNL/APL alignment
>
>Looking at the code and latest patches I see quite a few differences
>between APL and CNL that makes no sense to me.
>
>1. why would use a workqueue based on SSP (APL) and CPU (CNL)?

Currently the workqueue is using wall clock on both APL and CNL, this is
19.2MHz on APL and 24MHz on CNL, so I think we should use SSP(or
another new created type?) on both APL and CNL.

>2. why would we initialize the SSP to 25MHz for CNL? It's clearly not a
>supported frequency, 25MHz can only be reached on BYT and CHT. On a
>similar note not sure why APL makes a reference to 24 MHz, it should be
>24576000.

On APL, it is now set to 19.2MHz at platform_init, I had plan to enable this
(without ECS set) before CNY but failed to get it work.

For CNL, I agree it should be 24MHz, let's change it.

>3. why would we use DMAC class 1/2 on APL and class 6/7 on CNL?

Actually this doesn't impact the usage of DMAC for us during my testing,
but right, we should make it consistent for APL and CNL.

Liam, any comment on this?

>
>
>Conversely I always thought there were differences in the HDaudio DMA
>channel count between APL and CNL, so can we really share common
>definitions in src/drivers/hda-dma.c ?

Yes we can, the difference(channel count, irq num, dmac list, ...) is listed
in  platform/dma.c dma array.

Thanks,
~Keyon

>
>Thanks
>-Pierre
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