[Sound-open-firmware] [PATCH] apl-ssp: allow for 19.2 MHz SSP reference

[Pierre-Louis Bossart]

On 4/12/18 11:00 PM, Jie, Yang wrote:
>> -----Original Message-----
>> From: sound-open-firmware-bounces at alsa-project.org [mailto:sound-open-
>> firmware-bounces at alsa-project.org] On Behalf Of Pierre-Louis Bossart
>> Sent: Friday, April 13, 2018 10:14 AM
>> To: sound-open-firmware at alsa-project.org
>> Cc: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
>> Subject: [Sound-open-firmware] [PATCH] apl-ssp: allow for 19.2 MHz SSP
>> reference
>>
>> Don't hard-code MCLK source on ApolloLake, use settings provided over IPC to
>> select 24.576 MHz PLL or 19.2 MHz XTAL oscillator.
>>
>> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
>> ---
>> src/drivers/apl-ssp.c | 12 +++++++++++-
>> 1 file changed, 11 insertions(+), 1 deletion(-)
>>
>> diff --git a/src/drivers/apl-ssp.c b/src/drivers/apl-ssp.c index 3a97cb8..8f9bc14
>> 100644
>> --- a/src/drivers/apl-ssp.c
>> +++ b/src/drivers/apl-ssp.c
>> @@ -479,7 +479,17 @@ static inline int ssp_set_config(struct dai *dai,  #ifdef
>> CONFIG_CANNONLAKE
>> 	mdivc = 0x1;
>> #else
>> -	mdivc = 0x00100001;
>> +	if (config->ssp.mclk_rate == 24576000) {
>> +		/* enable PLL, bypass M/N dividers */
>> +		mdivc = 0x00100001;
>> +	} else if (config->ssp.mclk_rate == 19200000) {
>> +		/* no PLL, use XTAl oscillator as source */
>> +		mdivc = 0;
> 
> Looks fine to me, Hi Pierre, do you have chance to test 19.2M MCLK on APL yet?

Yes I tested 19.2 on APL (Up^2 with new BIOS) and the waveforms are fine 
with the right frequencies and data in the right places (i tried 
I2S/LEFT_J and DSP_B).

> 
> Thanks,
> ~Keyon
> 
>> +	} else {
>> +		trace_ssp_error("eci");
>> +		ret = -EINVAL;
>> +		goto out;
>> +	}
>> #endif
>> 	/* bypass divider for MCLK */
>> 	mdivr = 0x00000fff;
>> --
>> 2.14.1
>>
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