[Sound-open-firmware] [PATCH 1/6] uapi: ipc: align ipc.h with kernel

Pierre-Louis Bossart pierre-louis.bossart at linux.intel.com
Thu Apr 5 03:43:12 CEST 2018


Style corrections and addition of panic codes

Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
---
 src/include/uapi/ipc.h | 86 ++++++++++++++++++++++----------------------------
 1 file changed, 38 insertions(+), 48 deletions(-)

diff --git a/src/include/uapi/ipc.h b/src/include/uapi/ipc.h
index 5ec9ec3..2bf3752 100644
--- a/src/include/uapi/ipc.h
+++ b/src/include/uapi/ipc.h
@@ -37,7 +37,7 @@
 /*
  * IPC messages have a prefixed 32 bit identifier made up as follows :-
  *
- * 	0xGCCCNNNN where
+ * 0xGCCCNNNN where
  * G is global cmd type (4 bits)
  * C is command type (12 bits)
  * I is the ID number (16 bits) - monotonic and overflows
@@ -71,7 +71,6 @@
  * DSP Command Message Types
  */
 
-
 /* topology */
 #define SOF_IPC_TPLG_COMP_NEW			SOF_CMD_TYPE(0x001)
 #define SOF_IPC_TPLG_COMP_FREE			SOF_CMD_TYPE(0x002)
@@ -97,7 +96,6 @@
 #define SOF_IPC_COMP_SET_DATA			SOF_CMD_TYPE(0x003)
 #define SOF_IPC_COMP_GET_DATA			SOF_CMD_TYPE(0x004)
 
-
 /* DAI messages */
 #define SOF_IPC_DAI_CONFIG			SOF_CMD_TYPE(0x001)
 #define SOF_IPC_DAI_LOOPBACK			SOF_CMD_TYPE(0x002)
@@ -123,7 +121,7 @@
 /* Get message component id */
 #define SOF_IPC_MESSAGE_ID(x)			(x & 0xffff)
 
-/* maximum message size for mailbox Tx/Tx */
+/* maximum message size for mailbox Tx/Rx */
 #define SOF_IPC_MSG_MAX_SIZE			128
 
 /*
@@ -175,7 +173,6 @@ struct sof_ipc_reply {
 	int32_t error;			/* negative error numbers */
 }  __attribute__((packed));
 
-
 /*
  * Compound commands - SOF_IPC_GLB_COMPOUND.
  *
@@ -187,35 +184,34 @@ struct sof_ipc_reply {
 
 struct sof_ipc_compound_hdr {
 	struct sof_ipc_hdr hdr;
-	uint32_t count;			/* count of 0 means end of compound sequence */
+	uint32_t count;		/* count of 0 means end of compound sequence */
 }  __attribute__((packed));
 
-
 /*
  * DAI Configuration.
  *
  * Each different DAI type will have it's own structure and IPC cmd.
  */
 
-#define SOF_DAI_FMT_I2S			1 /* I2S mode */
-#define SOF_DAI_FMT_RIGHT_J		2 /* Right Justified mode */
-#define SOF_DAI_FMT_LEFT_J		3 /* Left Justified mode */
-#define SOF_DAI_FMT_DSP_A		4 /* L data MSB after FRM LRC */
-#define SOF_DAI_FMT_DSP_B		5 /* L data MSB during FRM LRC */
-#define SOF_DAI_FMT_PDM			6 /* Pulse density modulation */
+#define SOF_DAI_FMT_I2S		1 /* I2S mode */
+#define SOF_DAI_FMT_RIGHT_J	2 /* Right Justified mode */
+#define SOF_DAI_FMT_LEFT_J	3 /* Left Justified mode */
+#define SOF_DAI_FMT_DSP_A	4 /* L data MSB after FRM LRC */
+#define SOF_DAI_FMT_DSP_B	5 /* L data MSB during FRM LRC */
+#define SOF_DAI_FMT_PDM		6 /* Pulse density modulation */
 
-#define SOF_DAI_FMT_CONT		(1 << 4) /* continuous clock */
-#define SOF_DAI_FMT_GATED		(0 << 4) /* clock is gated */
+#define SOF_DAI_FMT_CONT	(1 << 4) /* continuous clock */
+#define SOF_DAI_FMT_GATED	(0 << 4) /* clock is gated */
 
-#define SOF_DAI_FMT_NB_NF		(0 << 8) /* normal bit clock + frame */
-#define SOF_DAI_FMT_NB_IF		(2 << 8) /* normal BCLK + inv FRM */
-#define SOF_DAI_FMT_IB_NF		(3 << 8) /* invert BCLK + nor FRM */
-#define SOF_DAI_FMT_IB_IF		(4 << 8) /* invert BCLK + FRM */
+#define SOF_DAI_FMT_NB_NF	(0 << 8) /* normal bit clock + frame */
+#define SOF_DAI_FMT_NB_IF	(2 << 8) /* normal BCLK + inv FRM */
+#define SOF_DAI_FMT_IB_NF	(3 << 8) /* invert BCLK + nor FRM */
+#define SOF_DAI_FMT_IB_IF	(4 << 8) /* invert BCLK + FRM */
 
-#define SOF_DAI_FMT_CBM_CFM		(0 << 12) /* codec clk & FRM master */
-#define SOF_DAI_FMT_CBS_CFM		(2 << 12) /* codec clk slave & FRM master */
-#define SOF_DAI_FMT_CBM_CFS		(3 << 12) /* codec clk master & frame slave */
-#define SOF_DAI_FMT_CBS_CFS		(4 << 12) /* codec clk & FRM slave */
+#define SOF_DAI_FMT_CBM_CFM	(0 << 12) /* codec clk & FRM master */
+#define SOF_DAI_FMT_CBS_CFM	(2 << 12) /* codec clk slave & FRM master */
+#define SOF_DAI_FMT_CBM_CFS	(3 << 12) /* codec clk master & frame slave */
+#define SOF_DAI_FMT_CBS_CFS	(4 << 12) /* codec clk & FRM slave */
 
 #define SOF_DAI_FMT_FORMAT_MASK		0x000f
 #define SOF_DAI_FMT_CLOCK_MASK		0x00f0
@@ -249,7 +245,6 @@ struct sof_ipc_dai_dmic_params {
 	/* TODO */
 } __attribute__((packed));
 
-
 /* general purpose DAI configuration */
 struct sof_ipc_dai_config {
 	struct sof_ipc_hdr hdr;
@@ -420,14 +415,12 @@ struct sof_ipc_vorbis_params {
 	/* TODO */
 }  __attribute__((packed));
 
-
 /* free stream - SOF_IPC_STREAM_PCM_PARAMS */
 struct sof_ipc_stream {
 	struct sof_ipc_hdr hdr;
 	uint32_t comp_id;
 } __attribute__((packed));
 
-
 /* flags indicating which time stamps are in sync with each other */
 #define	SOF_TIME_HOST_SYNC	(1 << 0)
 #define	SOF_TIME_DAI_SYNC	(1 << 1)
@@ -494,7 +487,7 @@ struct sof_ipc_ctrl_value_chan {
 
 /* generic component mapped value data */
 struct sof_ipc_ctrl_value_comp {
-	uint32_t index;		/* component source/sink/control index in control */
+	uint32_t index;	/* component source/sink/control index in control */
 	union {
 		uint32_t uvalue;
 		int32_t svalue;
@@ -547,12 +540,12 @@ enum sof_comp_type {
 	SOF_COMP_BUFFER,
 	SOF_COMP_EQ_IIR,
 	SOF_COMP_EQ_FIR,
-        SOF_COMP_FILEREAD,	/* host test based file IO */
-        SOF_COMP_FILEWRITE,	/* host test based file IO */
+	SOF_COMP_FILEREAD,	/* host test based file IO */
+	SOF_COMP_FILEWRITE,	/* host test based file IO */
 };
 
 /* XRUN action for component */
-#define SOF_XRUN_STOP		1 	/* stop stream */
+#define SOF_XRUN_STOP		1	/* stop stream */
 #define SOF_XRUN_UNDER_ZERO	2	/* send 0s to sink */
 #define SOF_XRUN_OVER_NULL	4	/* send data to NULL */
 
@@ -575,7 +568,6 @@ struct sof_ipc_buffer {
 	uint32_t caps;		/* SOF_MEM_CAPS_ */
 } __attribute__((packed));
 
-
 /* generic component config data - must always be after struct sof_ipc_comp */
 struct sof_ipc_comp_config {
 	uint32_t periods_sink;	/* 0 means variable */
@@ -590,7 +582,7 @@ struct sof_ipc_comp_host {
 	struct sof_ipc_comp comp;
 	struct sof_ipc_comp_config config;
 	enum sof_ipc_stream_direction direction;
-	uint32_t no_irq;	/* dont send periodic IRQ to host/DSP */
+	uint32_t no_irq;	/* don't send periodic IRQ to host/DSP */
 	uint32_t dmac_id;
 	uint32_t dmac_chan;
 	uint32_t dmac_config; /* DMA engine specific */
@@ -665,17 +657,16 @@ struct sof_ipc_comp_tone {
 
 /* FIR equalizer component */
 struct sof_ipc_comp_eq_fir {
-       struct sof_ipc_comp comp;
-       struct sof_ipc_comp_config config;
+	struct sof_ipc_comp comp;
+	struct sof_ipc_comp_config config;
 } __attribute__((packed));
 
 /* IIR equalizer component */
 struct sof_ipc_comp_eq_iir {
-       struct sof_ipc_comp comp;
-       struct sof_ipc_comp_config config;
+	struct sof_ipc_comp comp;
+	struct sof_ipc_comp_config config;
 } __attribute__((packed));
 
-
 /* frees components, buffers and pipelines
  * SOF_IPC_TPLG_COMP_FREE, SOF_IPC_TPLG_PIPE_FREE, SOF_IPC_TPLG_BUFFER_FREE
  */
@@ -684,14 +675,12 @@ struct sof_ipc_free {
 	uint32_t id;
 } __attribute__((packed));
 
-
 struct sof_ipc_comp_reply {
 	struct sof_ipc_reply rhdr;
 	uint32_t id;
 	uint32_t offset;
 } __attribute__((packed));
 
-
 /*
  * Pipeline
  */
@@ -706,9 +695,9 @@ struct sof_ipc_pipe_new {
 	uint32_t deadline;	/* execution completion deadline in us*/
 	uint32_t priority;	/* priority level 0 (low) to 10 (max) */
 	uint32_t mips;		/* worst case instruction count per period */
-	uint32_t frames_per_sched; /* output frames of pipeline, 0 is variable */
+	uint32_t frames_per_sched;/* output frames of pipeline, 0 is variable */
 	uint32_t xrun_limit_usecs; /* report xruns greater than limit */
-	uint32_t timer;		/* non zero if timer scheduled otherwise DAI scheduled */
+	uint32_t timer;/* non zero if timer scheduled otherwise DAI scheduled */
 }  __attribute__((packed));
 
 /* pipeline construction complete - SOF_IPC_TPLG_PIPE_COMPLETE */
@@ -717,7 +706,6 @@ struct sof_ipc_pipe_ready {
 	uint32_t comp_id;
 }  __attribute__((packed));
 
-
 struct sof_ipc_pipe_free {
 	struct sof_ipc_hdr hdr;
 	uint32_t comp_id;
@@ -730,7 +718,6 @@ struct sof_ipc_pipe_comp_connect {
 	uint32_t sink_id;
 }  __attribute__((packed));
 
-
 /*
  * PM
  */
@@ -742,8 +729,10 @@ struct sof_ipc_pm_ctx_elem {
 	uint64_t addr;
 }  __attribute__((packed));
 
-/* PM context - SOF_IPC_PM_CTX_SAVE, SOF_IPC_PM_CTX_RESTORE,
- * SOF_IPC_PM_CTX_SIZE */
+/*
+ * PM context - SOF_IPC_PM_CTX_SAVE, SOF_IPC_PM_CTX_RESTORE,
+ * SOF_IPC_PM_CTX_SIZE
+ */
 struct sof_ipc_pm_ctx {
 	struct sof_ipc_hdr hdr;
 	struct sof_ipc_host_buffer buffer;
@@ -813,16 +802,17 @@ struct sof_ipc_dma_buffer_elem {
 struct sof_ipc_dma_buffer_data {
 	struct sof_ipc_ext_data_hdr ext_hdr;
 	uint32_t num_buffers;
-	struct sof_ipc_dma_buffer_elem buffer[];	/* host files in buffer[n].buffer */
+	/* host files in buffer[n].buffer */
+	struct sof_ipc_dma_buffer_elem buffer[];
 }  __attribute__((packed));
 
-
 struct sof_ipc_window_elem {
 	enum sof_ipc_region type;
 	uint32_t id;	/* platform specific - used to map to host memory */
 	uint32_t flags;	/* R, W, RW, etc - to define */
 	uint32_t size;	/* size of region in bytes */
-	uint32_t offset; /* offset in window region as windows can be partitioned */
+	/* offset in window region as windows can be partitioned */
+	uint32_t offset;
 };
 
 /* extended data memory windows for IPC, trace and debug */
-- 
2.14.1



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