[Sound-open-firmware] [PATCH] cht: fix SSP IRQ sharing

[Liam Girdwood]

SSP 0,1,2 on CHT share the same physical IRQ as SSP 3,4,5 respectively.
Fix this so that all SSPs IRQs are supported.

Signed-off-by: Liam Girdwood <liam.r.girdwood at linux.intel.com>
---
 src/drivers/ssp.c                                  | 9 +++++++++
 src/platform/baytrail/include/platform/interrupt.h | 7 +++++++
 src/platform/baytrail/include/platform/shim.h      | 1 +
 src/platform/baytrail/platform.c                   | 2 +-
 4 files changed, 18 insertions(+), 1 deletion(-)

diff --git a/src/drivers/ssp.c b/src/drivers/ssp.c
index 8eacd0c..9eb4934 100644
--- a/src/drivers/ssp.c
+++ b/src/drivers/ssp.c
@@ -400,8 +400,17 @@ static int ssp_probe(struct dai *dai)
 	ssp->state[DAI_DIR_PLAYBACK] = COMP_STATE_READY;
 	ssp->state[DAI_DIR_CAPTURE] = COMP_STATE_READY;
 
+#if defined CONFIG_CHERRYTRAIL
+	/* register our IRQ handler - CHT shares SSP 0,1,2 IRQs with SSP 3,4,5 */
+	if (ssp_irq(dai) >= IRQ_CHT_SSP_OFFSET)
+		interrupt_register(ssp_irq(dai) - IRQ_CHT_SSP_OFFSET,
+			ssp_irq_handler, dai);
+	else
+		interrupt_register(ssp_irq(dai), ssp_irq_handler, dai);
+#else
 	/* register our IRQ handler */
 	interrupt_register(ssp_irq(dai), ssp_irq_handler, dai);
+#endif
 	platform_interrupt_unmask(ssp_irq(dai), 1);
 	interrupt_enable(ssp_irq(dai));
 
diff --git a/src/platform/baytrail/include/platform/interrupt.h b/src/platform/baytrail/include/platform/interrupt.h
index 8c97122..d197d67 100644
--- a/src/platform/baytrail/include/platform/interrupt.h
+++ b/src/platform/baytrail/include/platform/interrupt.h
@@ -56,6 +56,13 @@
 #define IRQ_NUM_EXT_DMAC2	19	/* Level 5 */
 #define IRQ_NUM_NMI		20	/* Level 7 */
 
+/* SSP 3,4,5 share PHY IRQs with SSP 0,1,2 respectively but we give them a
+  virtual number in order to differentiate from SSP0, 1 and 2 IRQs */
+#define IRQ_CHT_SSP_OFFSET	16
+#define IRQ_NUM_EXT_SSP3	(IRQ_CHT_SSP_OFFSET + IRQ_NUM_EXT_SSP0)	/* Level 5 */
+#define IRQ_NUM_EXT_SSP4	(IRQ_CHT_SSP_OFFSET + IRQ_NUM_EXT_SSP1)	/* Level 5 */
+#define IRQ_NUM_EXT_SSP5	(IRQ_CHT_SSP_OFFSET + IRQ_NUM_EXT_SSP2)	/* Level 5 */
+
 /* IRQ Masks */
 #define IRQ_MASK_SOFTWARE0	(1 << IRQ_NUM_SOFTWARE0)
 #define IRQ_MASK_TIMER1		(1 << IRQ_NUM_TIMER1)
diff --git a/src/platform/baytrail/include/platform/shim.h b/src/platform/baytrail/include/platform/shim.h
index b2e9132..61bc6a8 100644
--- a/src/platform/baytrail/include/platform/shim.h
+++ b/src/platform/baytrail/include/platform/shim.h
@@ -38,6 +38,7 @@
 #define SHIM_PISR		0x08
 #define SHIM_PISRH		0x0c
 #define SHIM_PIMR		0x10
+#define SHIM_PIMRH		0x14
 #define SHIM_ISRX		0x18
 #define SHIM_ISRD		0x20
 #define SHIM_IMRX		0x28
diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c
index 61596bb..441621c 100644
--- a/src/platform/baytrail/platform.c
+++ b/src/platform/baytrail/platform.c
@@ -179,7 +179,7 @@ void platform_interrupt_mask(uint32_t irq, uint32_t mask)
 		break;
 #if defined CONFIG_CHERRYTRAIL
 	case IRQ_NUM_EXT_DMAC2:
-		shim_write(SHIM_PISMH, mask << 8);
+		shim_write(SHIM_PIMRH, mask << 8);
 		break;
 	case IRQ_NUM_EXT_SSP3:
 		shim_write(SHIM_PIMRH, mask << 0);
-- 
2.11.0