[Sound-open-firmware] [PATCH] byt: use correct hifi2 EP version for BYT and CHT.

[Liam Girdwood]

BYT and CHT have EP Hifi2 extension so enable it.

Signed-off-by: Liam Girdwood <liam.r.girdwood at linux.intel.com>
---
 configure.ac                                               | 4 ++--
 src/platform/baytrail/include/xtensa/config/core-isa-byt.h | 2 +-
 src/platform/baytrail/include/xtensa/config/core-isa-cht.h | 2 +-
 3 files changed, 4 insertions(+), 4 deletions(-)

diff --git a/configure.ac b/configure.ac
index 091cc69..8946c36 100644
--- a/configure.ac
+++ b/configure.ac
@@ -77,7 +77,7 @@ case "$with_platform" in
 	FW_NAME="byt"
 	AC_SUBST(FW_NAME)
 
-	XTENSA_CORE="hifi2_std"
+	XTENSA_CORE="hifiep_bd5"
 	AC_SUBST(XTENSA_CORE)
 
 	AC_DEFINE([CONFIG_BAYTRAIL], [1], [Configure for Baytrail])
@@ -93,7 +93,7 @@ case "$with_platform" in
 	FW_NAME="cht"
 	AC_SUBST(FW_NAME)
 
-	XTENSA_CORE="hifi2_std"
+	XTENSA_CORE="hifiep_bd5"
 	AC_SUBST(XTENSA_CORE)
 
 	AC_DEFINE([CONFIG_CHERRYTRAIL], [1], [Configure for Cherrytrail])
diff --git a/src/platform/baytrail/include/xtensa/config/core-isa-byt.h b/src/platform/baytrail/include/xtensa/config/core-isa-byt.h
index 5ee2a2d..4fbc4fe 100644
--- a/src/platform/baytrail/include/xtensa/config/core-isa-byt.h
+++ b/src/platform/baytrail/include/xtensa/config/core-isa-byt.h
@@ -176,7 +176,7 @@
 
 #define XCHAL_SW_VERSION		1100002	/* sw version of this header */
 
-#define XCHAL_CORE_ID			"hifi2ep"	/* alphanum core name
+#define XCHAL_CORE_ID			"hifiep_bd5"	/* alphanum core name
 						   (CoreID) set in the Xtensa
 						   Processor Generator */
 
diff --git a/src/platform/baytrail/include/xtensa/config/core-isa-cht.h b/src/platform/baytrail/include/xtensa/config/core-isa-cht.h
index 5ee2a2d..4fbc4fe 100644
--- a/src/platform/baytrail/include/xtensa/config/core-isa-cht.h
+++ b/src/platform/baytrail/include/xtensa/config/core-isa-cht.h
@@ -176,7 +176,7 @@
 
 #define XCHAL_SW_VERSION		1100002	/* sw version of this header */
 
-#define XCHAL_CORE_ID			"hifi2ep"	/* alphanum core name
+#define XCHAL_CORE_ID			"hifiep_bd5"	/* alphanum core name
 						   (CoreID) set in the Xtensa
 						   Processor Generator */
 
-- 
2.14.1