[Sound-open-firmware] [PATCH] cht: Add M/N dividers for 19.2MHz

[Liam Girdwood]

Add some M/N divider entries for 19.2M source clock.

Signed-off-by: Liam Girdwood <liam.r.girdwood at linux.intel.com>
---
 src/platform/baytrail/platform.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/src/platform/baytrail/platform.c b/src/platform/baytrail/platform.c
index 814d60d..588530a 100644
--- a/src/platform/baytrail/platform.c
+++ b/src/platform/baytrail/platform.c
@@ -100,12 +100,17 @@ struct ssp_mn {
 	uint32_t n;
 };
 
+/* TODO: move over to the PLL instead of M/N */
 static const struct ssp_mn ssp_mn_conf[] = {
 	{25000000, 24, 48000, 1152, 25000},     /* 1.152MHz */
 	{25000000, 32, 48000, 1536, 25000},	/* 1.536MHz */
 	{25000000, 64, 48000, 3072, 25000},	/* 3.072MHz */
 	{25000000, 400, 48000, 96, 125},	/* 19.2MHz */
 	{25000000, 400, 44100, 441, 625},	/* 17.64MHz */
+	{19200000, 24, 48000, 3, 50},    	/* 1.152MHz */
+	{19200000, 32, 48000, 2, 25},		/* 1.536MHz */
+	{19200000, 64, 48000, 4, 25},		/* 3.072MHz */
+	{19200000, 400, 44100, 441, 480},	/* 17.64MHz */
 };
 
 /* set the SSP M/N clock dividers */
-- 
2.7.4