[PATCH 4/9] ASoC: dt-bindings: meson: convert axg tdm formatters to schema
Jerome Brunet
jbrunet at baylibre.com
Thu Feb 2 19:36:48 CET 2023
Convert the DT binding documentation for the Amlogic tdm formatters to
schema.
Signed-off-by: Jerome Brunet <jbrunet at baylibre.com>
---
.../sound/amlogic,axg-tdm-formatters.txt | 36 --------
.../sound/amlogic,axg-tdm-formatters.yaml | 90 +++++++++++++++++++
2 files changed, 90 insertions(+), 36 deletions(-)
delete mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
create mode 100644 Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
deleted file mode 100644
index 5996c0cd89c2..000000000000
--- a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.txt
+++ /dev/null
@@ -1,36 +0,0 @@
-* Amlogic Audio TDM formatters
-
-Required properties:
-- compatible: 'amlogic,axg-tdmin' or
- 'amlogic,axg-tdmout' or
- 'amlogic,g12a-tdmin' or
- 'amlogic,g12a-tdmout' or
- 'amlogic,sm1-tdmin' or
- 'amlogic,sm1-tdmout
-- reg: physical base address of the controller and length of memory
- mapped region.
-- clocks: list of clock phandle, one for each entry clock-names.
-- clock-names: should contain the following:
- * "pclk" : peripheral clock.
- * "sclk" : bit clock.
- * "sclk_sel" : bit clock input multiplexer.
- * "lrclk" : sample clock
- * "lrclk_sel": sample clock input multiplexer
-
-Optional property:
-- resets: phandle to the dedicated reset line of the tdm formatter.
-
-Example of TDMOUT_A on the S905X2 SoC:
-
-tdmout_a: audio-controller at 500 {
- compatible = "amlogic,axg-tdmout";
- reg = <0x0 0x500 0x0 0x40>;
- resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
- clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
- <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
- clock-names = "pclk", "sclk", "sclk_sel",
- "lrclk", "lrclk_sel";
-};
diff --git a/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
new file mode 100644
index 000000000000..f618724411de
--- /dev/null
+++ b/Documentation/devicetree/bindings/sound/amlogic,axg-tdm-formatters.yaml
@@ -0,0 +1,90 @@
+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/sound/amlogic,axg-tdm-formatters.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Amlogic Audio AXG TDM formatters
+
+maintainers:
+ - Jerome Brunet <jbrunet at baylibre.com>
+
+allOf:
+ - $ref: component-common.yaml#
+
+properties:
+ $nodename:
+ pattern: "^audio-controller at .*"
+
+ compatible:
+ oneOf:
+ - enum:
+ - amlogic,g12a-tdmout
+ - amlogic,sm1-tdmout
+ - amlogic,axg-tdmout
+ - amlogic,g12a-tdmin
+ - amlogic,sm1-tdmin
+ - amlogic,axg-tdmin
+
+ clocks:
+ items:
+ - description: Peripheral clock
+ - description: Bit clock
+ - description: Bit clock input multiplexer
+ - description: Sample clock
+ - description: Sample clock input multiplexer
+
+ clock-names:
+ items:
+ - const: pclk
+ - const: sclk
+ - const: sclk_sel
+ - const: lrclk
+ - const: lrclk_sel
+
+ reg:
+ maxItems: 1
+
+required:
+ - compatible
+ - reg
+ - clocks
+ - clock-names
+
+if:
+ properties:
+ compatible:
+ contains:
+ enum:
+ - amlogic,g12a-tdmin
+ - amlogic,sm1-tdmin
+ - amlogic,g12a-tdmout
+ - amlogic,sm1-tdmout
+then:
+ properties:
+ resets:
+ items:
+ - description: Dedicated device reset line
+
+ required:
+ - resets
+
+unevaluatedProperties: false
+
+examples:
+ - |
+ #include <dt-bindings/clock/axg-audio-clkc.h>
+ #include <dt-bindings/reset/amlogic,meson-g12a-audio-reset.h>
+
+ tdmout_a: audio-controller at 500 {
+ compatible = "amlogic,g12a-tdmout";
+ reg = <0x500 0x40>;
+ resets = <&clkc_audio AUD_RESET_TDMOUT_A>;
+ clocks = <&clkc_audio AUD_CLKID_TDMOUT_A>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_SCLK_SEL>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>,
+ <&clkc_audio AUD_CLKID_TDMOUT_A_LRCLK>;
+ clock-names = "pclk", "sclk", "sclk_sel",
+ "lrclk", "lrclk_sel";
+ };
--
2.39.0
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