[PATCH v2 2/4] ALSA: hda: Rework snd_hdac_stream_reset() to use macros
Amadeusz Sławiński
amadeuszx.slawinski at linux.intel.com
Wed Oct 5 16:47:20 CEST 2022
On 10/5/2022 4:26 PM, Jon Hunter wrote:
>
>
> On 05/10/2022 15:07, Takashi Iwai wrote:
>> On Wed, 05 Oct 2022 15:52:01 +0200,
>> Jon Hunter wrote:
>>>
>>>
>>> On 05/10/2022 13:29, Takashi Iwai wrote:
>>>
>>> ...
>>>
>>>>> HDA playback is failing on -next for various Tegra boards. Bisect is
>>>>> point to this commit and reverting it fixes the problem. I was a bit
>>>>> puzzled why this change is causing a problem, but looking closer there
>>>>> is a difference between the previous code that was calling
>>>>> snd_hdac_stream_readb() and the new code that is calling
>>>>> snd_hdac_stream_readb_poll(). The function snd_hdac_stream_readb()
>>>>> calls snd_hdac_aligned_mmio() is see if the device has an aligned MMIO
>>>>> which Tegra does and then would call snd_hdac_aligned_read(). However,
>>>>> now the code always call readb() and this is breaking Tegra.
>>>>>
>>>>> So it is either necessary to update snd_hdac_stream_readb_poll() to
>>>>> handle this or revert this change.
>>>>
>>>> Does the patch below work?
>>>>
>>>>
>>>> thanks,
>>>>
>>>> Takashi
>>>>
>>>> -- 8< --
>>>> --- a/include/sound/hdaudio.h
>>>> +++ b/include/sound/hdaudio.h
>>>> @@ -592,8 +592,8 @@ int snd_hdac_get_stream_stripe_ctl(struct
>>>> hdac_bus *bus,
>>>> #define snd_hdac_stream_readb(dev, reg) \
>>>> snd_hdac_reg_readb((dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
>>>> #define snd_hdac_stream_readb_poll(dev, reg, val, cond, delay_us,
>>>> timeout_us) \
>>>> - readb_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val, cond, \
>>>> - delay_us, timeout_us)
>>>> + read_poll_timeout(snd_hdac_reg_readb, val, cond, delay_us,
>>>> timeout_us,\
>>>> + false, (dev)->bus, (dev)->sd_addr + AZX_REG_ ## reg)
>>>> #define snd_hdac_stream_readl_poll(dev, reg, val, cond, delay_us,
>>>> timeout_us) \
>>>> readl_poll_timeout((dev)->sd_addr + AZX_REG_ ## reg, val,
>>>> cond, \
>>>> delay_us, timeout_us)
>>>
>>>
>>> Amazingly it does not work. I would have thought that would, but it
>>> does not. I am a bit puzzled by that?
>>
>> Interesting, it must be a subtle difference.
>> What about passing true? It seems that the original code has the
>> udelay(3) before the loop.
>
>
> I wondered the same and tried that, but still not working.
>
> Jon
>
Well in worse case we can revert the patch in question, but I would like
to get it working...
Maybe also try to raise timeout to 1000, as what original code called
timeout, was actually number of retries? So 300 * udelay(3) which is
more or less 900us, so we can round it up for test?
I mean, something like:
--- a/sound/hda/hdac_stream.c
+++ b/sound/hda/hdac_stream.c
@@ -176,7 +176,7 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL, 0, SD_CTL_STREAM_RESET);
/* wait for hardware to report that the stream entered reset */
- snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val &
SD_CTL_STREAM_RESET), 3, 300);
+ snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, (val &
SD_CTL_STREAM_RESET), 3, 1000);
if (azx_dev->bus->dma_stop_delay && dma_run_state)
udelay(azx_dev->bus->dma_stop_delay);
@@ -184,7 +184,7 @@ void snd_hdac_stream_reset(struct hdac_stream *azx_dev)
snd_hdac_stream_updateb(azx_dev, SD_CTL, SD_CTL_STREAM_RESET, 0);
/* wait for hardware to report that the stream is out of reset */
- snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val &
SD_CTL_STREAM_RESET), 3, 300);
+ snd_hdac_stream_readb_poll(azx_dev, SD_CTL, val, !(val &
SD_CTL_STREAM_RESET), 3, 1000);
/* reset first position - may not be synced with hw at this time */
if (azx_dev->posbuf)
in addition to Takashi suggestion?
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