[PATCH V7 4/5] ASoC: codecs: Aw883xx chip register file, data type file and Kconfig Makefile
Pierre-Louis Bossart
pierre-louis.bossart at linux.intel.com
Thu Dec 22 16:53:55 CET 2022
> +
> +#define PROJECT_NAME_MAX (24)
> +#define CUSTOMER_NAME_MAX (16)
> +#define CFG_VERSION_MAX (4)
> +#define DEV_NAME_MAX (16)
> +#define PROFILE_STR_MAX (32)
> +
> +#define ACF_FILE_ID (0xa15f908)
align on one indentation please
> +
> +enum aw_cfg_hdr_version {
> + AW_CFG_HDR_VER_0_0_0_1 = 0x00000001,
> + AW_CFG_HDR_VER_1_0_0_0 = 0x01000000,
> +};
> +
> +struct aw_cfg_hdr {
> + u32 a_id; /*acf file ID 0xa15f908*/
> + char a_project[PROJECT_NAME_MAX]; /*project name*/
> + char a_custom[CUSTOMER_NAME_MAX]; /*custom name */
> + char a_version[CFG_VERSION_MAX]; /*author update version*/
> + u32 a_author_id; /*author id*/
> + u32 a_ddt_size; /*sub section table entry size*/
> + u32 a_ddt_num; /*sub section table entry num*/
> + u32 a_hdr_offset; /*sub section table offset in file*/
> + u32 a_hdr_version; /*sub section table version*/
> + u32 reserve[3];
> +};
use spaces before and after /* and */
and what's up with the a_ prefix, is this needed?
> +
> +struct aw_cfg_dde {
> + u32 type; /*DDE type id*/
> + char dev_name[DEV_NAME_MAX];
> + u16 dev_index; /*dev id*/
> + u16 dev_bus; /*dev bus id*/
> + u16 dev_addr; /*dev addr id*/
> + u16 dev_profile; /*dev profile id*/
> + u32 data_type; /*data type id*/
> + u32 data_size;
> + u32 data_offset;
> + u32 data_crc;
> + u32 reserve[5];
reserved
> +};
> +
> +struct aw_cfg_dde_v_1_0_0_0 {
> + u32 type; /*DDE type id*/
> + char dev_name[DEV_NAME_MAX];
> + u16 dev_index; /*dev id*/
> + u16 dev_bus; /*dev bus id*/
> + u16 dev_addr; /*dev addr id*/
> + u16 dev_profile; /*dev profile id*/
> + u32 data_type; /*data type id*/
> + u32 data_size;
> + u32 data_offset;
> + u32 data_crc;
> + char dev_profile_str[PROFILE_STR_MAX];
> + u32 chip_id;
> + u32 reserve[4];
> +};
> +
> +struct aw_sec_data_desc {
> + u32 len;
> + u8 *data;
> +};
> +
> +struct aw_prof_desc {
> + u32 id;
> + u32 prof_st;
> + char *prf_str;
> + u32 fw_ver;
> + struct aw_sec_data_desc sec_desc[AW_DATA_TYPE_MAX];
> +};
> +
> +struct aw_all_prof_info {
> + struct aw_prof_desc prof_desc[AW_PROFILE_MAX];
> +};
> +
> +struct aw_prof_info {
> + int count;
> + int prof_type;
> + char **prof_name_list;
> + struct aw_prof_desc *prof_desc;
> +};
> +
> +#endif
> +
> diff --git a/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h b/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h
> new file mode 100644
> index 000000000000..21d1e913db0b
> --- /dev/null
> +++ b/sound/soc/codecs/aw883xx/aw883xx_pid_2049_reg.h
> @@ -0,0 +1,490 @@
> +/* SPDX-License-Identifier: GPL-2.0-only */
> +/*
> + * aw883xx.c -- ALSA SoC AW883XX codec support
> + *
> + * Copyright (c) 2022 AWINIC Technology CO., LTD
> + *
> + * Author: Bruce zhao <zhaolei at awinic.com>
> + */
> +
> +#ifndef __AW883XX_PID_2049_REG_H__
> +#define __AW883XX_PID_2049_REG_H__
> +
> +#define AW_PID_2049_ID_REG (0x00)
> +#define AW_PID_2049_SYSST_REG (0x01)
> +#define AW_PID_2049_SYSINT_REG (0x02)
> +#define AW_PID_2049_SYSINTM_REG (0x03)
> +#define AW_PID_2049_SYSCTRL_REG (0x04)
> +#define AW_PID_2049_SYSCTRL2_REG (0x05)
> +#define AW_PID_2049_I2SCTRL_REG (0x06)
> +#define AW_PID_2049_I2SCFG1_REG (0x07)
> +#define AW_PID_2049_I2SCFG2_REG (0x08)
> +#define AW_PID_2049_HAGCCFG1_REG (0x09)
> +#define AW_PID_2049_HAGCCFG2_REG (0x0A)
> +#define AW_PID_2049_HAGCCFG3_REG (0x0B)
> +#define AW_PID_2049_HAGCCFG4_REG (0x0C)
> +#define AW_PID_2049_HAGCCFG5_REG (0x0D)
> +#define AW_PID_2049_HAGCCFG6_REG (0x0E)
> +#define AW_PID_2049_HAGCCFG7_REG (0x0F)
> +#define AW_PID_2049_MPDCFG_REG (0x10)
> +#define AW_PID_2049_PWMCTRL_REG (0x11)
> +#define AW_PID_2049_I2SCFG3_REG (0x12)
> +#define AW_PID_2049_DBGCTRL_REG (0x13)
> +#define AW_PID_2049_HAGCST_REG (0x20)
> +#define AW_PID_2049_VBAT_REG (0x21)
> +#define AW_PID_2049_TEMP_REG (0x22)
> +#define AW_PID_2049_PVDD_REG (0x23)
> +#define AW_PID_2049_ISNDAT_REG (0x24)
> +#define AW_PID_2049_VSNDAT_REG (0x25)
> +#define AW_PID_2049_I2SINT_REG (0x26)
> +#define AW_PID_2049_I2SCAPCNT_REG (0x27)
> +#define AW_PID_2049_ANASTA1_REG (0x28)
> +#define AW_PID_2049_ANASTA2_REG (0x29)
> +#define AW_PID_2049_ANASTA3_REG (0x2A)
> +#define AW_PID_2049_ANASTA4_REG (0x2B)
> +#define AW_PID_2049_TESTDET_REG (0x2C)
> +#define AW_PID_2049_TESTIN_REG (0x38)
> +#define AW_PID_2049_TESTOUT_REG (0x39)
> +#define AW_PID_2049_DSPMADD_REG (0x40)
> +#define AW_PID_2049_DSPMDAT_REG (0x41)
> +#define AW_PID_2049_WDT_REG (0x42)
> +#define AW_PID_2049_ACR1_REG (0x43)
> +#define AW_PID_2049_ACR2_REG (0x44)
> +#define AW_PID_2049_ASR1_REG (0x45)
> +#define AW_PID_2049_ASR2_REG (0x46)
> +#define AW_PID_2049_DSPCFG_REG (0x47)
> +#define AW_PID_2049_ASR3_REG (0x48)
> +#define AW_PID_2049_ASR4_REG (0x49)
> +#define AW_PID_2049_VSNCTRL1_REG (0x50)
> +#define AW_PID_2049_ISNCTRL1_REG (0x51)
> +#define AW_PID_2049_PLLCTRL1_REG (0x52)
> +#define AW_PID_2049_PLLCTRL2_REG (0x53)
> +#define AW_PID_2049_PLLCTRL3_REG (0x54)
> +#define AW_PID_2049_CDACTRL1_REG (0x55)
> +#define AW_PID_2049_CDACTRL2_REG (0x56)
> +#define AW_PID_2049_SADCCTRL1_REG (0x57)
> +#define AW_PID_2049_SADCCTRL2_REG (0x58)
> +#define AW_PID_2049_CPCTRL1_REG (0x59)
> +#define AW_PID_2049_BSTCTRL1_REG (0x60)
> +#define AW_PID_2049_BSTCTRL2_REG (0x61)
> +#define AW_PID_2049_BSTCTRL3_REG (0x62)
> +#define AW_PID_2049_BSTCTRL4_REG (0x63)
> +#define AW_PID_2049_BSTCTRL5_REG (0x64)
> +#define AW_PID_2049_BSTCTRL6_REG (0x65)
> +#define AW_PID_2049_BSTCTRL7_REG (0x66)
> +#define AW_PID_2049_DSMCFG1_REG (0x67)
> +#define AW_PID_2049_DSMCFG2_REG (0x68)
> +#define AW_PID_2049_DSMCFG3_REG (0x69)
> +#define AW_PID_2049_DSMCFG4_REG (0x6A)
> +#define AW_PID_2049_DSMCFG5_REG (0x6B)
> +#define AW_PID_2049_DSMCFG6_REG (0x6C)
> +#define AW_PID_2049_DSMCFG7_REG (0x6D)
> +#define AW_PID_2049_DSMCFG8_REG (0x6E)
> +#define AW_PID_2049_TESTCTRL1_REG (0x70)
> +#define AW_PID_2049_TESTCTRL2_REG (0x71)
> +#define AW_PID_2049_EFCTRL1_REG (0x72)
> +#define AW_PID_2049_EFCTRL2_REG (0x73)
> +#define AW_PID_2049_EFWH_REG (0x74)
> +#define AW_PID_2049_EFWM2_REG (0x75)
> +#define AW_PID_2049_EFWM1_REG (0x76)
> +#define AW_PID_2049_EFWL_REG (0x77)
> +#define AW_PID_2049_EFRH_REG (0x78)
> +#define AW_PID_2049_EFRM2_REG (0x79)
> +#define AW_PID_2049_EFRM1_REG (0x7A)
> +#define AW_PID_2049_EFRL_REG (0x7B)
> +#define AW_PID_2049_TM_REG (0x7C)
indentation is distracting, please pick one.
> +
> +/*
> + * Register Access
> + */
> +enum aw883xx_id {
> + AW883XX_PID_2049 = 0x2049,
> +};
> +
> +#define AW_PID_2049_REG_MAX (0x7D)
> +
> +#define REG_NONE_ACCESS (0)
> +#define REG_RD_ACCESS (1 << 0)
> +#define REG_WR_ACCESS (1 << 1)
> +
> +#define AW_PID_2049_VOLUME_STEP_DB (6 * 8)
> +
> +#define AW_PID_2049_SOFT_RESET_VALUE (0x55aa)
> +
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