[PATCH v2] ASoC: Intel: sof_nau8825: add variant with nau8318 amplifier.

[Ajye Huang]

Hi Pierre

On Sat, Dec 17, 2022 at 12:03 AM Pierre-Louis Bossart
<pierre-louis.bossart at linux.intel.com> wrote:

> On 12/16/22 09:49, Ajye Huang wrote:
> > This patch adds the driver data for two nau8318 speaker amplifiers on
> > SSP1 and nau8825 on SSP0 for ADL platform.
>
> So here you are making reference to two amplifiers...
>
> > +static struct snd_soc_dai_link_component nau8318_components[] = {
> > +     {
> > +             .name = "NVTN2012:00",
> > +             .dai_name = "nau8315-hifi",
> > +     }
> > +};
>
> but here there's only one? I was expecting something like what we've
> used for Maxim amplifiers with a codec configuration and dailink
> components that list the two amplifiers.
>
> static struct snd_soc_codec_conf max_98373_codec_conf[] = {
>         {
>                 .dlc = COMP_CODEC_CONF(MAX_98373_DEV0_NAME),
>                 .name_prefix = "Right",
>         },
>         {
>                 .dlc = COMP_CODEC_CONF(MAX_98373_DEV1_NAME),
>                 .name_prefix = "Left",
>         },
> };
>
> struct snd_soc_dai_link_component max_98373_components[] = {
>         {  /* For Right */
>                 .name = MAX_98373_DEV0_NAME,
>                 .dai_name = MAX_98373_CODEC_DAI,
>         },
>         {  /* For Left */
>                 .name = MAX_98373_DEV1_NAME,
>                 .dai_name = MAX_98373_CODEC_DAI,
>         },
> };
>
> Or is this a commit message problem and there's really only one amplifier?

Really , it has two speakers.  The nau8318 is an auto mode Amplifier
chip, similar to the max98360a amp chip.
EX: Sof_maxim_common.c (sound\soc\intel\boards):
static struct snd_soc_dai_link_component max_98360a_components[] = {
    {
        .name = MAX_98360A_DEV0_NAME,
        .dai_name = MAX_98357A_CODEC_DAI,
    }
};
It is not an i2c interface,  from the nau8318 data sheet, there are
five pins used mainly. one for enable, others for I2S.
EN-- enable pin
FSR-- Frame Sync, Right
FSL--  Frame Sync, Left
BCLK--  bit clock
DACIN-- Input i2s data

The FSR and FSL pins are for Left and Right channels used.
thanks