Simple card and PLL/FLL

[Mark Brown]

On Fri, Dec 09, 2022 at 09:33:52AM +0100, Francesco Dolcini wrote:
> On Wed, Dec 07, 2022 at 05:37:50PM +0000, Mark Brown wrote:

> > It's kind of a taste thing.  There's some devices where the clocking is
> > sufficently complicated and flexible that definitely needs a set_pll()
> > ...
> > for simpler devices like the WM8904 where there's an obvious thing to
> > do it's much easier to just hide that from everything outside the
> > driver and only deal with the input clock.

> Thinking about asoc_simple_hw_params(), what about the fact that
> asoc_simple_set_clk_rate() ask for a specific clock rate and assume that
> the actual output frequency is the one requested?

> After that we are potentially passing to the codec driver a wrong
> information, we should likely have a way to pass the actual clock that
> could be different because of limitation on the PLL/dividers.

The machine probably just shouldn't use mclk-fs in that case.
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