[PATCH v4 20/21] ASoC: fsl_micfil: fold fsl_set_clock_params() into its only user
Sascha Hauer
s.hauer at pengutronix.de
Thu Apr 7 10:49:35 CEST 2022
fsl_set_clock_params() is used only once and easily be folded into its
caller, do so.
Signed-off-by: Sascha Hauer <s.hauer at pengutronix.de>
Acked-by: Shengjiu Wang <shengjiu.wang at gmail.com>
---
sound/soc/fsl/fsl_micfil.c | 41 ++++++++++++--------------------------
1 file changed, 13 insertions(+), 28 deletions(-)
diff --git a/sound/soc/fsl/fsl_micfil.c b/sound/soc/fsl/fsl_micfil.c
index 7afe6ea42b817..8f0ab61fd1b07 100644
--- a/sound/soc/fsl/fsl_micfil.c
+++ b/sound/soc/fsl/fsl_micfil.c
@@ -252,29 +252,6 @@ static int fsl_micfil_trigger(struct snd_pcm_substream *substream, int cmd,
return 0;
}
-static int fsl_set_clock_params(struct device *dev, unsigned int rate)
-{
- struct fsl_micfil *micfil = dev_get_drvdata(dev);
- int clk_div = 8;
- int osr = MICFIL_OSR_DEFAULT;
- int ret;
-
- ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
- if (ret)
- return ret;
-
- ret = micfil_set_quality(micfil);
- if (ret)
- return ret;
-
- ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
- MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
- FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
- FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr));
-
- return ret;
-}
-
static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
struct snd_pcm_hw_params *params,
struct snd_soc_dai *dai)
@@ -282,7 +259,8 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
struct fsl_micfil *micfil = snd_soc_dai_get_drvdata(dai);
unsigned int channels = params_channels(params);
unsigned int rate = params_rate(params);
- struct device *dev = &micfil->pdev->dev;
+ int clk_div = 8;
+ int osr = MICFIL_OSR_DEFAULT;
int ret;
/* 1. Disable the module */
@@ -297,11 +275,18 @@ static int fsl_micfil_hw_params(struct snd_pcm_substream *substream,
if (ret)
return ret;
- ret = fsl_set_clock_params(dev, rate);
- if (ret < 0) {
- dev_err(dev, "Failed to set clock parameters [%d]\n", ret);
+ ret = clk_set_rate(micfil->mclk, rate * clk_div * osr * 8);
+ if (ret)
return ret;
- }
+
+ ret = micfil_set_quality(micfil);
+ if (ret)
+ return ret;
+
+ ret = regmap_update_bits(micfil->regmap, REG_MICFIL_CTRL2,
+ MICFIL_CTRL2_CLKDIV | MICFIL_CTRL2_CICOSR,
+ FIELD_PREP(MICFIL_CTRL2_CLKDIV, clk_div) |
+ FIELD_PREP(MICFIL_CTRL2_CICOSR, 16 - osr));
micfil->dma_params_rx.peripheral_config = &micfil->sdmacfg;
micfil->dma_params_rx.peripheral_size = sizeof(micfil->sdmacfg);
--
2.30.2
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