[PATCH 1/3] pinctrl: qcom: Update lpass variant independent functions as generic

[Stephen Boyd]

Quoting Srinivasa Rao Mandadapu (2021-10-07 06:48:37)
> diff --git a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> index 2f19ab4..c0117c5 100644
> --- a/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> +++ b/drivers/pinctrl/qcom/pinctrl-lpass-lpi.c
> @@ -124,7 +124,8 @@ static const struct pinctrl_pin_desc sm8250_lpi_pins[] = {
>         PINCTRL_PIN(13, "gpio13"),
>  };
>
> -enum sm8250_lpi_functions {
> +

Please drop this extra newline so the diff makes sense.

> +enum lpass_lpi_functions {
>         LPI_MUX_dmic1_clk,
>         LPI_MUX_dmic1_data,
>         LPI_MUX_dmic2_clk,
> @@ -203,7 +204,7 @@ static const struct lpi_pingroup sm8250_groups[] = {
>         LPI_PINGROUP(13, NO_SLEW, dmic3_data, i2s2_data, _, _),
>  };
>
> -static const struct lpi_function sm8250_functions[] = {
> +static const struct lpi_function lpass_functions[] = {

Why not follow the approach of other qcom pinctrl drivers and make a
core driver that each SoC uses as a library?

>         LPI_FUNCTION(dmic1_clk),
>         LPI_FUNCTION(dmic1_data),
>         LPI_FUNCTION(dmic2_clk),
> @@ -615,7 +616,7 @@ static int lpi_pinctrl_probe(struct platform_device *pdev)
>                 return dev_err_probe(dev, PTR_ERR(pctrl->slew_base),
>                                      "Slew resource not provided\n");
>
> -       ret = devm_clk_bulk_get(dev, MAX_LPI_NUM_CLKS, pctrl->clks);
> +       ret = devm_clk_bulk_get_optional(dev, MAX_LPI_NUM_CLKS, pctrl->clks);

Please mention in the commit text why this is now optional.

>         if (ret)
>                 return dev_err_probe(dev, ret, "Can't get clocks\n");
>