[RFC patch 0/5] Support BCLK input clock in tlv320aic31xx
Ariel D'Alessandro
ariel.dalessandro at collabora.com
Fri Nov 19 16:32:43 CET 2021
The tlv320aic31xx codec allows using BCLK as the input clock for PLL,
deriving all the frequencies through a set of divisors.
In this case, codec sysclk is determined by the hwparams sample
rate/format. So its frequency must be updated from the codec itself when
these are changed.
This patchset modifies the tlv320aic31xx driver to update its sysclk if
BCLK is used as the input clock. This allows to be used by the generic
fsl-asoc-card, without having to add a specific driver.
Ariel D'Alessandro (5):
ASoC: tlv320aic31xx: Fix typo in BCLK clock name
ASoC: tlv320aic31xx: Add support for pll_r coefficient
ASoC: tlv320aic31xx: Add divs for bclk as clk_in
ASoC: tlv320aic31xx: Handle BCLK set as PLL input configuration
ASoC: fsl-asoc-card: Support fsl,imx-audio-tlv320aic31xx codec
sound/soc/codecs/tlv320aic31xx.c | 105 ++++++++++++++++++++-----------
sound/soc/codecs/tlv320aic31xx.h | 2 +-
sound/soc/fsl/fsl-asoc-card.c | 12 ++++
3 files changed, 83 insertions(+), 36 deletions(-)
--
2.30.2
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