Issues using simple-audio-card driver with Xilinx Audio Formatter

[Mark Brown]

On Fri, Jul 09, 2021 at 05:05:47PM +0000, Robert Hancock wrote:
> On Fri, 2021-07-09 at 13:38 +0100, Mark Brown wrote:

> > For something like this I think the driver should be able to figure out
> > the ratio based on the configured MCLK and sample rate.  For the most
> > part set_clkdiv() should be a legacy thing, it's very manual and hard to
> > see why a system would do something different to the obvious ratio
> > usually.

> Possibly the I2S transmitter should be implementing set_sysclk rather than
> set_clkdiv then? simple-audio-card seems like it would already propagate that
> through into the CPU DAI in asoc_simple_hw_params and then it could figure out
> the right divider value to use.

I think so.

> The tricky part is that the Audio Formatter (used as the "plat" component here)
> also needs to know what the mclk-fs value is. (I really don't know why it
> cares, I would think it would just push data to the output stream as fast as it
> was accepted, but indeed it does have a register to set the sample rate to MCLK
> divider, and if it's not set properly the I2S transmitter downstream seems to
> constantly get underruns.) I'm not sure if there's any mechanism for it to
> determine the value right now, or if something new would need to be added?

Given that it knows the MCLK if set_sysclk() is used and it knows the
sample rate it should just be able to calculate the ratio?
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