Issues using simple-audio-card driver with Xilinx Audio Formatter

[Mark Brown]

On Fri, Jul 09, 2021 at 10:16:45AM +0900, Kuninori Morimoto wrote:

> > So the next issue I'm now facing is that the MCLK to SCLK divider is not being
> > set properly in either the Audio Formatter (MM2S Fs Multiplier register) or in
> > the I2S Transmitter (I2S Timing Control register). The xlnx_i2s driver has a
> > set_clkdiv function defined in its snd_soc_dai_ops structure, however that
> > doesn't appear to be getting called. And the xlnx_formatter_pcm driver doesn't
> > seem to have any code to set XLNX_AUD_FS_MULTIPLIER at all.

> > In this case I have a sample rate to MCLK divider of 256, so it looks like I
> > should add mclk-fs = <256> into the dai-link nodes in the device tree, but
> > there will need to be some code added to the xlnx_formatter_pcm to do something
> > with that information? And then should that driver have code to trigger the
> > call to set_clkdiv on the CPU DAI as well?

> Hmm... clock is one of difficult point to be generic, I guess.
> audio-graph / audio-graph2 has customize feature in such case,
> but simple-card doesn't.

> 	- create generic clock handling way on simple-card ?
> 	- add customize feature to simple-card ?
> 	- switch to audio-graph / audio-graph2, and use customize feature ?

> Thank you for your help !!

For something like this I think the driver should be able to figure out
the ratio based on the configured MCLK and sample rate.  For the most
part set_clkdiv() should be a legacy thing, it's very manual and hard to
see why a system would do something different to the obvious ratio
usually.
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