[RFC PATCH 0/3] Separate BE DAI HW constraints from FE ones

[Codrin.Ciubotariu at microchip.com]

On 16.04.2021 19:31, Mark Brown wrote:
> On Fri, Apr 16, 2021 at 04:03:05PM +0000, Codrin.Ciubotariu at microchip.com wrote:
> 
>> Thank you for the links! So basically the machine driver disappears and
>> all the components will be visible in user-space.
> 
> Not entirely - you still need something to say how they're wired
> together but it'll be a *lot* simpler for anything that currently used
> DPCM.

Right, device-tree/acpi wiring is not enough...

> 
>> If there is a list with the 'steps' or tasks to achieve this? I can try
>> to pitch in.
> 
> Not really written down that I can think of.  I think the next steps
> that I can think of right now are unfortunately bigger and harder ones,
> mainly working out a way to represent digital configuration as a graph
> that can be attached to/run in parallel with DAPM other people might
> have some better ideas though.  Sorry, I appreciate that this isn't
> super helpful :/
> 

I think I have good picture, a more robust card->dai_link, not with just 
FEs and BEs ... I will try to monitor the alsa list more, see what other 
people are working on. Thank you for your time!

Best regards,
Codrin