imx8mm fsl_sai clock config failing

Daniel Baluta daniel.baluta at nxp.com
Mon May 18 16:48:48 CEST 2020


Hi Tim,

<snip>


>> I'm trying to get imx8mm sai working with a tlv320aic3x codec on a new board
>> and am finding that the sai3 bus clock is getting derived from the wrong source
>> leading hw_params() to fail with 'fsl-sai
>> 30030000.sai: failed to derive required Tx rate: 3072000'
>>
>> In comparison to the imx8mm-evk I find it's clock gets configured as desired yet
>> I have the same device-tree configuration for sai3.

It is strange that setting sai3 works with wolfson codec but not yours.

It should either work for both or for none.

Anyhow, can you please try to create a more specific clock hierarchy

similar with the on for 8mq (see imx8mq-evk.dts).


&sai2 {
»       pinctrl-names = "default";
»       pinctrl-0 = <&pinctrl_sai2>;
»       assigned-clocks = <&clk IMX8MQ_AUDIO_PLL1_BYPASS>, <&clk 
IMX8MQ_CLK_SAI2>;
»       assigned-clock-parents = <&clk IMX8MQ_AUDIO_PLL1>, <&clk 
IMX8MQ_AUDIO_PLL1_OUT>;
»       assigned-clock-rates = <0>, <24576000>;
»       status = "okay";
};
Note that even though the imx8mm-evk appears to configure its clock 
correctly I

>> still have not been able to play audio out the wm8524 and the system appears
>> to hang during playback as if BCLK/MCLK were not clocking.
>>
>> Perhaps there is something not supported yet upstream with regards to
>> IMX8MM SAI?
>>
>

I remember that wm8524 worked for me both with imx8mm/imx8mq. Can you sync

at commit


commit 13f3b9fdef6c7d9ad069ae617707e5a10a685074
Author: Daniel Baluta <daniel.baluta at nxp.com>
Date:   Tue Jun 4 20:32:57 2019 +0800

and give it a try.


Also, what SDMA firmware are you using? That might be a problem. I don't 
remember

if the default ROM firmware worked.


Sorry for the late reply. Somehow I missed your email. You can always 
find some of us

from NXP on linux-imx IRC channel on irc.freenode.net


thanks,

Daniel.



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