[PATCH 2/7] soundwire: intel: reuse code for wait loops to set/clear bits
Vinod Koul
vkoul at kernel.org
Fri Mar 20 14:38:34 CET 2020
On 11-03-20, 17:10, Pierre-Louis Bossart wrote:
> Refactor code and use same routines on set/clear
>
> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
> ---
> drivers/soundwire/intel.c | 45 +++++++++++++++++----------------------
> 1 file changed, 19 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/soundwire/intel.c b/drivers/soundwire/intel.c
> index 28a8563c4e0f..1a3b828b03a1 100644
> --- a/drivers/soundwire/intel.c
> +++ b/drivers/soundwire/intel.c
> @@ -134,40 +134,33 @@ static inline void intel_writew(void __iomem *base, int offset, u16 value)
> writew(value, base + offset);
> }
>
> +static int intel_wait_bit(void __iomem *base, int offset, u32 mask, u32 target)
> +{
> + int timeout = 10;
> + u32 reg_read;
> +
> + do {
> + reg_read = readl(base + offset);
> + if ((reg_read & mask) == target)
> + return 0;
> +
> + timeout--;
> + udelay(50);
This should use udelay_range, but this can be different patch as this is
code move, so okay
> + } while (timeout != 0);
> +
> + return -EAGAIN;
> +}
> +
> static int intel_clear_bit(void __iomem *base, int offset, u32 value, u32 mask)
> {
> - int timeout = 10;
> - u32 reg_read;
> -
> writel(value, base + offset);
> - do {
> - reg_read = readl(base + offset);
> - if (!(reg_read & mask))
> - return 0;
> -
> - timeout--;
> - udelay(50);
> - } while (timeout != 0);
> -
> - return -EAGAIN;
> + return intel_wait_bit(base, offset, mask, 0);
> }
>
> static int intel_set_bit(void __iomem *base, int offset, u32 value, u32 mask)
> {
> - int timeout = 10;
> - u32 reg_read;
> -
> writel(value, base + offset);
> - do {
> - reg_read = readl(base + offset);
> - if (reg_read & mask)
> - return 0;
> -
> - timeout--;
> - udelay(50);
> - } while (timeout != 0);
> -
> - return -EAGAIN;
> + return intel_wait_bit(base, offset, mask, mask);
> }
>
> /*
> --
> 2.20.1
--
~Vinod
More information about the Alsa-devel
mailing list