[alsa-devel] [PATCH v5 2/7] ASoC: tegra: Allow 24bit and 32bit samples

Dmitry Osipenko digetx at gmail.com
Tue Jan 21 19:54:24 CET 2020


21.01.2020 21:15, Ben Dooks пишет:
> On 07/01/2020 10:29, Jon Hunter wrote:
>>
>> On 05/01/2020 10:53, Ben Dooks wrote:
>>>
>>>
>>> On 2020-01-05 01:48, Dmitry Osipenko wrote:
>>>> 05.01.2020 03:04, Ben Dooks пишет:
>>>>> [snip]
>>>>>
>>>>> I've just gone through testing.
>>>>>
>>>>> Some simple data tests show 16 and 32-bits work.
>>>>>
>>>>> The 24 bit case seems to be weird, it looks like the 24-bit expects
>>>>> 24 bit samples in 32 bit words. I can't see any packing options to
>>>>> do 24 bit in 24 bit, so we may have to remove 24 bit sample support
>>>>> (which is a shame)
>>>>>
>>>>> My preference is to remove the 24-bit support and keep the 32 bit in.
>>>>>
>>>>
>>>> Interesting.. Jon, could you please confirm that 24bit format isn't
>>>> usable on T30?
>>>
>>> If there is an option of 24 packed into 32, then I think that would
>>> work.
>>>
>>> I can try testing that with raw data on Monday.
>>
>> I will check on this. I would have thought that S24_LE (24-bits packed
>> into 32-bit elements) would be fine. Typically we don't support S24_3LE
>> (24-bits in 24-bit elements).
>>
> 
> I've just had to spend time fixing pulseview/sigrok's i2s handling for
> this, but have run a simple test of S24_LE using a pattern generator
> and the low level output looks ok.
> 
> I will test a bit more tomorrow, but I suspect something else is either
> getting S24_LE wrong or we have some other issue.

Okay, thanks for the update.


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