[PATCH 4/4] ASoC: Intel: Skylake: Automatic DMIC format configuration according to information from NHLT

[Pierre-Louis Bossart]

> @@ -3123,12 +3141,15 @@ static int skl_tplg_control_load(struct snd_soc_component *cmpnt,
>   	case SND_SOC_TPLG_CTL_ENUM:
>   		tplg_ec = container_of(hdr,
>   				struct snd_soc_tplg_enum_control, hdr);
> -		if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READWRITE) {
> +		if (kctl->access & SNDRV_CTL_ELEM_ACCESS_READ) {
>   			se = (struct soc_enum *)kctl->private_value;
>   			if (tplg_ec->priv.size)
> -				return skl_init_enum_data(bus->dev, se,
> -						tplg_ec);
> +				skl_init_enum_data(bus->dev, se, tplg_ec);
>   		}
> +
> +		if (hdr->ops.get == SKL_CONTROL_TYPE_MULTI_IO_SELECT_DMIC)
> +			kctl->access = SNDRV_CTL_ELEM_ACCESS_READ;
> +

Is it intentional that you first test the kctrl->access as READ only, 
and then later set it to READ only for DMICs? The sequence looks rather odd?