[alsa-devel] [PATCH 1/8] ASoC: tegra: Add a TDM configuration callback
Pierre-Louis Bossart
pierre-louis.bossart at linux.intel.com
Wed Sep 18 15:33:50 CEST 2019
On 9/18/19 5:48 AM, Mark Brown wrote:
> On Wed, Sep 18, 2019 at 11:25:39AM +0100, Jon Hunter wrote:
>
>> Why 2? From looking at various codecs that support dsp-a/b modes, it is
>> more common for the f-sync to be 1 regardless of the number of slots.
>
> In DSP modes only one edge really matters anyway so it's not super
> important how long the pulse is.
There are exceptions to the rule.
In the early days of SOF, we had to provide support for amplifiers that
did require a pulse larger than a bit. In the SOF IPC we added an
'frame_pulse_width' field to pass the configuration all the way from
topology to the firmware and Intel SSP driver.
The other quirk we added is the ability to control zero-padding per slot
instead of at the end of the frame, e.g. 1 bit of padding after 24 bits
when using 4 slots w/ 25 bits in a 100-bit frame.
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