[alsa-devel] [PATCH 1/2] ASoC: dt-bingdings: mediatek: mt8183: add a property "medaitek, toprgu"
Jiaxin Yu
jiaxin.yu at mediatek.com
Thu Sep 12 11:54:55 CEST 2019
This patch adds a property "mediatek,toprgu" in example so that we could
use reset controller(usually we call it toprgu or watchdog) to reset audio
domain regs.
Signed-off-by: Jiaxin Yu <jiaxin.yu at mediatek.com>
---
Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt | 2 ++
1 file changed, 2 insertions(+)
diff --git a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
index 396ba38619f6..45ca182a4ecc 100644
--- a/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
+++ b/Documentation/devicetree/bindings/sound/mt8183-afe-pcm.txt
@@ -4,6 +4,7 @@ Required properties:
- compatible = "mediatek,mt68183-audio";
- reg: register location and size
- interrupts: should contain AFE interrupt
+- mediatek,toprgu: A phandle to the TOPRGU which for reset controller unit
- power-domains: should define the power domain
- clocks: Must contain an entry for each entry in clock-names
- clock-names: should have these clock names:
@@ -20,6 +21,7 @@ Example:
compatible = "mediatek,mt8183-audio";
reg = <0 0x11220000 0 0x1000>;
interrupts = <GIC_SPI 161 IRQ_TYPE_LEVEL_LOW>;
+ mediatek,toprgu = <&watchdog>;
power-domains = <&scpsys MT8183_POWER_DOMAIN_AUDIO>;
clocks = <&infrasys CLK_INFRA_AUDIO>,
<&infrasys CLK_INFRA_AUDIO_26M_BCLK>,
--
2.18.0
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