[alsa-devel] [PATCH 5/8] soundwire: add port-related definitions
Pierre-Louis Bossart
pierre-louis.bossart at linux.intel.com
Sat May 4 02:29:23 CEST 2019
Somehow previous header files did not include definition for
sink/source, flow and grouping.
Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
---
include/linux/soundwire/sdw.h | 53 +++++++++++++++++++++++++++++++++++
1 file changed, 53 insertions(+)
diff --git a/include/linux/soundwire/sdw.h b/include/linux/soundwire/sdw.h
index 594c17ed8593..bd05a85d345c 100644
--- a/include/linux/soundwire/sdw.h
+++ b/include/linux/soundwire/sdw.h
@@ -41,6 +41,31 @@ struct sdw_slave;
#define SDW_DAI_ID_RANGE_START 100
#define SDW_DAI_ID_RANGE_END 200
+enum {
+ SDW_PORT_DIRN_SINK = 0,
+ SDW_PORT_DIRN_SOURCE,
+ SDW_PORT_DIRN_MAX,
+};
+
+/*
+ * constants for flow control, ports and transport
+ *
+ * these are bit masks as devices can have multiple capabilities
+ */
+
+/*
+ * flow modes for SDW port. These can be isochronous, tx controlled,
+ * rx controlled or async
+ */
+#define SDW_PORT_FLOW_MODE_ISOCH 0
+#define SDW_PORT_FLOW_MODE_TX_CNTRL BIT(0)
+#define SDW_PORT_FLOW_MODE_RX_CNTRL BIT(1)
+#define SDW_PORT_FLOW_MODE_ASYNC GENMASK(1, 0)
+
+/* sample packaging for block. It can be per port or per channel */
+#define SDW_BLOCK_PACKG_PER_PORT BIT(0)
+#define SDW_BLOCK_PACKG_PER_CH BIT(1)
+
/**
* enum sdw_slave_status - Slave status
* @SDW_SLAVE_UNATTACHED: Slave is not attached with the bus.
@@ -76,6 +101,14 @@ enum sdw_command_response {
SDW_CMD_FAIL_OTHER = 4,
};
+/* block group count enum */
+enum sdw_dpn_grouping {
+ SDW_BLK_GRP_CNT_1 = 0,
+ SDW_BLK_GRP_CNT_2 = 1,
+ SDW_BLK_GRP_CNT_3 = 2,
+ SDW_BLK_GRP_CNT_4 = 3,
+};
+
/**
* enum sdw_stream_type: data stream type
*
@@ -100,6 +133,26 @@ enum sdw_data_direction {
SDW_DATA_DIR_TX = 1,
};
+/**
+ * enum sdw_port_data_mode: Data Port mode
+ *
+ * @SDW_PORT_DATA_MODE_NORMAL: Normal data mode where audio data is received
+ * and transmitted.
+ * @SDW_PORT_DATA_MODE_STATIC_1: Simple test mode which uses static value of
+ * logic 1. The encoding will result in signal transitions at every bitslot
+ * owned by this Port
+ * @SDW_PORT_DATA_MODE_STATIC_0: Simple test mode which uses static value of
+ * logic 0. The encoding will result in no signal transitions
+ * @SDW_PORT_DATA_MODE_PRBS: Test mode which uses a PRBS generator to produce
+ * a pseudo random data pattern that is transferred
+ */
+enum sdw_port_data_mode {
+ SDW_PORT_DATA_MODE_NORMAL = 0,
+ SDW_PORT_DATA_MODE_STATIC_1 = 1,
+ SDW_PORT_DATA_MODE_STATIC_0 = 2,
+ SDW_PORT_DATA_MODE_PRBS = 3,
+};
+
/*
* SDW properties, defined in MIPI DisCo spec v1.0
*/
--
2.17.1
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