[alsa-devel] [PATCH 01/21] ASoC: SOF: Intel: Add BYT, CHT and BSW DSP HW support.

[Daniel Baluta]

Hi Pierre,

<snip>

> +/* cherrytrail and braswell ops */
> +struct snd_sof_dsp_ops sof_cht_ops = {
> +       /* device init */
> +       .probe          = byt_probe,
> +
> +       /* DSP core boot / reset */
> +       .run            = byt_run,
> +       .reset          = byt_reset,
> +
> +       /* Register IO */
> +       .write          = sof_io_write,
> +       .read           = sof_io_read,
> +       .write64        = sof_io_write64,
> +       .read64         = sof_io_read64,
> +
> +       /* Block IO */
> +       .block_read     = sof_block_read,
> +       .block_write    = sof_block_write,
> +
> +       /* doorbell */
> +       .irq_handler    = byt_irq_handler,
> +       .irq_thread     = byt_irq_thread,
> +

What is the reason for having irq_handler/irq_thread functions inside the
snd_sof_dsp_ops structure?

These functions are never used outside via sdev->ops pointer.

thanks,
Daniel.