[alsa-devel] [PATCH v2 0/5] Stripe control functionality
Sameer Pujar
spujar at nvidia.com
Sat Jan 12 07:31:44 CET 2019
On 1/11/2019 11:32 PM, Pierre-Louis Bossart wrote:
>
> On 1/11/19 11:22 AM, Sameer Pujar wrote:
>> Background
>> ==========
>>
>> Azalia Controller fetches command and audio data via DMA and send them
>> to codec through SDO(Serial Data Out) lines. SDO is for outboung and it
>> broadcasts to all codecs. There is atleast one SDO line present, but
>> there can be multiple SDO lines supported for extended bandwidth. This
>> is essential when a platform supports multiple hdmi/dp sinks and there
>> is a requirement for higher resolution audio playback. In such cases
>> simultaneous audio playback data can be striped across multiple SDOs.
>>
>> Global Capabilities(GCAP) Register indicates the capabilities of the
>> controller. Bits 2:1 of GCAP can be read to know the number of supported
>> SDO lines (below is from HD audio spec)
>> 00: 1 SDO
>> 01: 2 SDO
>> 10: 4 SDO
>> 11: Reserved
>>
>> Stripe control verb reports and controls the stripe capability of an
>> Audio Output Converter. This verb needs to be implemented only for an
>> audio output converter and only if the stripe bit of the Audio Widget
>> Capabilities parameter is 1.
>> Stripe control: get code(0xf24) and set code(0x724)
>
> the series look ok (one minor comment on operator precedence) and
> aligned with my understanding of the HDaudio 1.0a spec.
>
> That said you made no mention of the Stripe bit (figure 86) and
> fields 22:20 (Stripe capability) in Figure 75, so it's not clear to me
> if the support added in this patchset is sufficient or if there is
> additional logic to be set.
>
Stripe bit is part of Audio Widget Capability parameter and is mentioned
above in the last section of background. Patch-5(v2) checks for the
stripe bit, before sending stripe control verb.
As far as stripe control register is concerned (22:20), I don't think
any SW programming is required for this.
> There is also a difference between what the controller supports and
> the actual board layout, so it's not clear if the GCAP are really the
> raw capabilities or the ones filtered by BIOS folks to reflect the
> actual platform hardware implementation.
>
> -Pierre
>
>
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