[alsa-devel] [PATCH] pcm: softvol: add support for S24_LE

[Jörg Krause]

On Tue, 2017-09-12 at 08:19 +0200, Clemens Ladisch wrote:
> Jörg Krause wrote:
> > On Fri, 2017-09-08 at 12:52 +0200, Clemens Ladisch wrote:
> > > Please describe exactly how the 24-bit sample is aligned into
> > > the 32-bit memory cell.
> > 
> > According to this old post [1] it is aligned as followed:
> 
> That post talks about S24_LE.  I was asking about the actual hardware.

The i.MX6UL has a Synchronous Audio Interface (SAI), where the data in
the FIFO can be aligned anywhere within the 32-bit wide register
through the use of the First Bit Shifted configuration field. In the
corresponding Linux SAI driver the FBS field is set the way that data
alignment for 24-bit data is:

31 30 29 28 | 27 26 25 24 | 23 22 21 20 | .. | 3 2 1 0
## ## ## ##   ## ## ## ## [           DATA[23:0]       ]


> > Meaning the left-most byte is zeroed, right?
> 
> What does "left" mean when talking about memory?

I should have said MSB first.