[alsa-devel] [PATCH V2 6/7] ALSA: x86: hdmi: Fixup some monitor

[Pierre-Louis Bossart]

On 1/6/17 7:21 PM, Jerome Anand wrote:
> This change was given to Canonical apparently to fix an issue with
> on some monitor brand. It's not clear what this patch does but it doesn't
> seem to have side effects.

 From Takashi:please fold into the main patch and give the comments in 
the code instead.


>
> Signed-off-by: David Henningsson <david.henningsson at canonical.com>
> Signed-off-by: Pierre-Louis Bossart <pierre-louis.bossart at linux.intel.com>
> Signed-off-by: Jerome Anand <jerome.anand at intel.com>
> ---
>  sound/x86/intel_hdmi_audio.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/sound/x86/intel_hdmi_audio.c b/sound/x86/intel_hdmi_audio.c
> index d2036bc..91efbeb 100644
> --- a/sound/x86/intel_hdmi_audio.c
> +++ b/sound/x86/intel_hdmi_audio.c
> @@ -337,6 +337,7 @@ static void snd_intelhad_reset_audio_v2(u8 reset)
>  static int had_prog_status_reg(struct snd_pcm_substream *substream,
>  			struct snd_intelhad *intelhaddata)
>  {
> +	union aud_cfg cfg_val = {.cfg_regval = 0};
>  	union aud_ch_status_0 ch_stat0 = {.status_0_regval = 0};
>  	union aud_ch_status_1 ch_stat1 = {.status_1_regval = 0};
>  	int format;
> @@ -347,6 +348,7 @@ static int had_prog_status_reg(struct snd_pcm_substream *substream,
>  						IEC958_AES0_NONAUDIO)>>1;
>  	ch_stat0.status_0_regx.clk_acc = (intelhaddata->aes_bits &
>  						IEC958_AES3_CON_CLOCK)>>4;
> +	cfg_val.cfg_regx.val_bit = ch_stat0.status_0_regx.lpcm_id;
>
>  	switch (substream->runtime->rate) {
>  	case AUD_SAMPLE_RATE_32:
> @@ -426,7 +428,6 @@ int snd_intelhad_prog_audio_ctrl_v2(struct snd_pcm_substream *substream,
>  	else
>  		cfg_val.cfg_regx_v2.layout = LAYOUT1;
>
> -	cfg_val.cfg_regx_v2.val_bit = 1;
>  	had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
>  	return 0;
>  }
> @@ -482,7 +483,6 @@ int snd_intelhad_prog_audio_ctrl_v1(struct snd_pcm_substream *substream,
>
>  	}
>
> -	cfg_val.cfg_regx.val_bit = 1;
>  	had_write_register(AUD_CONFIG, cfg_val.cfg_regval);
>  	return 0;
>  }
>