[alsa-devel] [PATCH 2/2] ASoC: stm32: add SAI driver
kbuild test robot
lkp at intel.com
Wed Feb 1 19:08:41 CET 2017
Hi olivier,
[auto build test WARNING on asoc/for-next]
[also build test WARNING on v4.10-rc6 next-20170201]
[if your patch is applied to the wrong git tree, please drop us a note to help improve the system]
url: https://github.com/0day-ci/linux/commits/olivier-moysan/Add-STM32-SAI-support/20170202-004848
base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next
config: i386-allmodconfig (attached as .config)
compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901
reproduce:
# save the attached .config to linux build tree
make ARCH=i386
Note: it may well be a FALSE warning. FWIW you are at least aware of it now.
http://gcc.gnu.org/wiki/Better_Uninitialized_Warnings
All warnings (new ones prefixed by >>):
sound/soc/stm/stm32_sai_sub.c: In function 'stm32_sai_hw_params':
>> sound/soc/stm/stm32_sai_sub.c:446:11: warning: 'cr1_mask' may be used uninitialized in this function [-Wmaybe-uninitialized]
cr1_mask |= SAI_XCR1_DS_MASK | SAI_XCR1_PRTCFG_MASK;
^~
sound/soc/stm/stm32_sai_sub.c:422:11: note: 'cr1_mask' was declared here
int cr1, cr1_mask, ret;
^~~~~~~~
>> sound/soc/stm/stm32_sai_sub.c:578:7: warning: 'mask' may be used uninitialized in this function [-Wmaybe-uninitialized]
mask |= SAI_XCR1_MCKDIV_MASK;
^~
sound/soc/stm/stm32_sai_sub.c:550:11: note: 'mask' was declared here
int cr1, mask, div = 0;
^~~~
sound/soc/stm/stm32_sai_sub.c: In function 'stm32_sai_sub_probe':
>> sound/soc/stm/stm32_sai_sub.c:788:3: warning: 'direction' may be used uninitialized in this function [-Wmaybe-uninitialized]
dev_err(&pdev->dev, "Unsupported direction %s\n", direction);
^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~
sound/soc/stm/stm32_sai_sub.c:765:14: note: 'direction' was declared here
const char *direction;
^~~~~~~~~
vim +/cr1_mask +446 sound/soc/stm/stm32_sai_sub.c
440 cr1 |= SAI_XCR1_DS_SET(SAI_DATASIZE_32);
441 break;
442 default:
443 dev_err(cpu_dai->dev, "Data format not supported");
444 return -EINVAL;
445 }
> 446 cr1_mask |= SAI_XCR1_DS_MASK | SAI_XCR1_PRTCFG_MASK;
447
448 cr1_mask |= SAI_XCR1_RX_TX;
449 if (STM_SAI_IS_CAPTURE(sai))
450 cr1 |= SAI_XCR1_RX_TX;
451
452 cr1_mask |= SAI_XCR1_MONO;
453 if ((sai->slots == 2) && (params_channels(params) == 1))
454 cr1 |= SAI_XCR1_MONO;
455
456 ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, cr1_mask, cr1);
457 if (ret < 0) {
458 dev_err(cpu_dai->dev, "Failed to update CR1 register\n");
459 return ret;
460 }
461
462 /* DMA config */
463 sai->dma_params.maxburst = STM_SAI_FIFO_SIZE * fth / sizeof(u32);
464 snd_soc_dai_set_dma_data(cpu_dai, substream, (void *)&sai->dma_params);
465
466 return 0;
467 }
468
469 static int stm32_sai_set_slots(struct snd_soc_dai *cpu_dai)
470 {
471 struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
472 int slotr, slot_sz;
473
474 regmap_read(sai->regmap, STM_SAI_SLOTR_REGX, &slotr);
475
476 /*
477 * If SLOTSZ is set to auto in SLOTR, align slot width on data size
478 * By default slot width = data size, if not forced from DT
479 */
480 slot_sz = slotr & SAI_XSLOTR_SLOTSZ_MASK;
481 if (slot_sz == SAI_XSLOTR_SLOTSZ_SET(SAI_SLOT_SIZE_AUTO))
482 sai->slot_width = sai->data_size;
483
484 if (sai->slot_width < sai->data_size) {
485 dev_err(cpu_dai->dev,
486 "Data size %d larger than slot width\n",
487 sai->data_size);
488 return -EINVAL;
489 }
490
491 /* Slot number is set to 2, if not specified in DT */
492 if (!sai->slots)
493 sai->slots = 2;
494
495 /* The number of slots in the audio frame is equal to NBSLOT[3:0] + 1*/
496 regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX,
497 SAI_XSLOTR_NBSLOT_MASK,
498 SAI_XSLOTR_NBSLOT_SET((sai->slots - 1)));
499
500 /* Set default slots mask if not already set from DT */
501 if (!(slotr & SAI_XSLOTR_SLOTEN_MASK)) {
502 sai->slot_mask = (1 << sai->slots) - 1;
503 regmap_update_bits(sai->regmap,
504 STM_SAI_SLOTR_REGX, SAI_XSLOTR_SLOTEN_MASK,
505 SAI_XSLOTR_SLOTEN_SET(sai->slot_mask));
506 }
507
508 dev_dbg(cpu_dai->dev, "slots %d, slot width %d\n",
509 sai->slots, sai->slot_width);
510
511 return 0;
512 }
513
514 static void stm32_sai_set_frame(struct snd_soc_dai *cpu_dai)
515 {
516 struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
517 int fs_active, offset, format;
518 int frcr, frcr_mask;
519
520 format = sai->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
521 sai->fs_length = sai->slot_width * sai->slots;
522
523 fs_active = sai->fs_length / 2;
524 if ((format == SND_SOC_DAIFMT_DSP_A) ||
525 (format == SND_SOC_DAIFMT_DSP_B))
526 fs_active = 1;
527
528 frcr = SAI_XFRCR_FRL_SET((sai->fs_length - 1));
529 frcr |= SAI_XFRCR_FSALL_SET((fs_active - 1));
530 frcr_mask = SAI_XFRCR_FRL_MASK | SAI_XFRCR_FSALL_MASK;
531
532 dev_dbg(cpu_dai->dev, "frame length %d, frame active %d\n",
533 sai->fs_length, fs_active);
534
535 regmap_update_bits(sai->regmap, STM_SAI_FRCR_REGX, frcr_mask, frcr);
536
537 if ((sai->fmt & SND_SOC_DAIFMT_FORMAT_MASK) == SND_SOC_DAIFMT_LSB) {
538 offset = sai->slot_width - sai->data_size;
539
540 regmap_update_bits(sai->regmap, STM_SAI_SLOTR_REGX,
541 SAI_XSLOTR_FBOFF_MASK,
542 SAI_XSLOTR_FBOFF_SET(offset));
543 }
544 }
545
546 static int stm32_sai_configure_clock(struct snd_soc_dai *cpu_dai,
547 struct snd_pcm_hw_params *params)
548 {
549 struct stm32_sai_sub_data *sai = snd_soc_dai_get_drvdata(cpu_dai);
550 int cr1, mask, div = 0;
551 int sai_clk_rate, ret;
552
553 if (!sai->mclk_rate) {
554 dev_err(cpu_dai->dev, "Mclk rate is null\n");
555 return -EINVAL;
556 }
557
558 if (!(params_rate(params) % 11025))
559 clk_set_parent(sai->sai_ck, sai->pdata->clk_x11k);
560 else
561 clk_set_parent(sai->sai_ck, sai->pdata->clk_x8k);
562 sai_clk_rate = clk_get_rate(sai->sai_ck);
563
564 /*
565 * mclk_rate = 256 * fs
566 * MCKDIV = 0 if sai_ck < 3/2 * mclk_rate
567 * MCKDIV = sai_ck / (2 * mclk_rate) otherwise
568 */
569 if (2 * sai_clk_rate >= 3 * sai->mclk_rate)
570 div = DIV_ROUND_CLOSEST(sai_clk_rate, 2 * sai->mclk_rate);
571
572 if (div > SAI_XCR1_MCKDIV_MAX) {
573 dev_err(cpu_dai->dev, "Divider %d out of range\n", div);
574 return -EINVAL;
575 }
576 dev_dbg(cpu_dai->dev, "SAI clock %d, divider %d\n", sai_clk_rate, div);
577
> 578 mask |= SAI_XCR1_MCKDIV_MASK;
579 cr1 = SAI_XCR1_MCKDIV_SET(div);
580 ret = regmap_update_bits(sai->regmap, STM_SAI_CR1_REGX, mask, cr1);
581 if (ret < 0) {
---
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