[alsa-devel] [PATCH 1/6] ASoC: cs42xx8: Mark chip ID as volatile and remove cache bypass
Mark Brown
broonie at kernel.org
Mon Oct 24 17:33:42 CEST 2016
On Mon, Oct 24, 2016 at 10:55:44AM +0100, Charles Keepax wrote:
> Rather than manually enabling cache bypass when reading the ID registers
> simply mark them as volatile. The old code worked this is simply the
> more standard way to implement this. There is a comment included in the
Even better just remove the register default, with rbtree regmap will do
the read and then cache it - no need to mark as volatile.
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