[alsa-devel] [PATCH 4/8] ASoC : dwc : add quirk for different register offset
Alex Deucher
alexdeucher at gmail.com
Thu Oct 8 18:12:37 CEST 2015
From: Maruthi Srinivas Bayyavarapu <Maruthi.Bayyavarapu at amd.com>
AMD CZ platform has different offsets for I2S_COMP_PARAM_* registers.
Added a quirk to support the same.
Signed-off-by: Maruthi Bayyavarapu <maruthi.bayyavarapu at amd.com>
---
include/sound/designware_i2s.h | 5 ++++-
sound/soc/dwc/designware_i2s.c | 17 +++++++++++++----
2 files changed, 17 insertions(+), 5 deletions(-)
diff --git a/include/sound/designware_i2s.h b/include/sound/designware_i2s.h
index 48c8210..240ef5e 100644
--- a/include/sound/designware_i2s.h
+++ b/include/sound/designware_i2s.h
@@ -45,8 +45,11 @@ struct i2s_platform_data {
u32 snd_fmts;
u32 snd_rates;
- #define DW_I2S_QUIRK_MULTI_DWC (1 << 0)
+ #define DW_I2S_QUIRK_MULTI_DWC (1 << 0)
+ #define DW_I2S_QUIRK_COMP_REG_OFFSET (1 << 1)
unsigned int quirks;
+ unsigned int i2s_reg_comp1;
+ unsigned int i2s_reg_comp2;
void *play_dma_data;
void *capture_dma_data;
diff --git a/sound/soc/dwc/designware_i2s.c b/sound/soc/dwc/designware_i2s.c
index fd18a0e..a16b725 100644
--- a/sound/soc/dwc/designware_i2s.c
+++ b/sound/soc/dwc/designware_i2s.c
@@ -95,6 +95,8 @@ struct dw_i2s_dev {
int active;
unsigned int capability;
unsigned int quirks;
+ unsigned int i2s_reg_comp1;
+ unsigned int i2s_reg_comp2;
struct device *dev;
/* data related to DMA transfers b/w i2s and DMAC */
@@ -464,8 +466,8 @@ static int dw_configure_dai(struct dw_i2s_dev *dev,
* Read component parameter registers to extract
* the I2S block's configuration.
*/
- u32 comp1 = i2s_read_reg(dev->i2s_pbase, I2S_COMP_PARAM_1);
- u32 comp2 = i2s_read_reg(dev->i2s_pbase, I2S_COMP_PARAM_2);
+ u32 comp1 = i2s_read_reg(dev->i2s_pbase, dev->i2s_reg_comp1);
+ u32 comp2 = i2s_read_reg(dev->i2s_pbase, dev->i2s_reg_comp2);
u32 idx;
if (COMP1_TX_ENABLED(comp1)) {
@@ -508,7 +510,7 @@ static int dw_configure_dai_by_pd(struct dw_i2s_dev *dev,
struct resource *res,
const struct i2s_platform_data *pdata)
{
- u32 comp1 = i2s_read_reg(dev->i2s_pbase, I2S_COMP_PARAM_1);
+ u32 comp1 = i2s_read_reg(dev->i2s_pbase, dev->i2s_reg_comp1);
u32 idx = COMP1_APB_DATA_WIDTH(comp1);
int ret;
@@ -610,9 +612,16 @@ static int dw_i2s_probe(struct platform_device *pdev)
dev->i2s_cbase = dev->i2s_pbase;
if (pdata) {
+ clk_id = NULL;
dev->capability = pdata->cap;
dev->quirks = pdata->quirks;
- clk_id = NULL;
+ if (dev->quirks & DW_I2S_QUIRK_COMP_REG_OFFSET) {
+ dev->i2s_reg_comp1 = pdata->i2s_reg_comp1;
+ dev->i2s_reg_comp2 = pdata->i2s_reg_comp2;
+ } else {
+ dev->i2s_reg_comp1 = I2S_COMP_PARAM_1;
+ dev->i2s_reg_comp2 = I2S_COMP_PARAM_2;
+ }
ret = dw_configure_dai_by_pd(dev, dw_i2s_dai, res, pdata);
} else {
clk_id = "i2sclk";
--
1.8.3.1
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