[alsa-devel] Applied "ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with another SAI mode" to the asoc tree
Mark Brown
broonie at kernel.org
Tue Nov 17 19:54:45 CET 2015
The patch
ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with another SAI mode
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.
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Thanks,
Mark
>From 9cc58712358cbfe51248ef369fc50671149b60fc Mon Sep 17 00:00:00 2001
From: Zidan Wang <zidan.wang at freescale.com>
Date: Mon, 9 Nov 2015 19:02:29 +0800
Subject: [PATCH] ASoC: fsl-sai: don't set bclk for Tx/Rx Synchronous with
another SAI mode
In fsl_sai_set_bclk function, we should not set bclk for Tx/Rx Synchronous
with another SAI mode.
Signed-off-by: Zidan Wang <zidan.wang at freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka at gmail.com>
Signed-off-by: Mark Brown <broonie at kernel.org>
---
sound/soc/fsl/fsl_sai.c | 16 ++++++++++++++--
1 file changed, 14 insertions(+), 2 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c
index a4435f5e3be9..7e421a97c090 100644
--- a/sound/soc/fsl/fsl_sai.c
+++ b/sound/soc/fsl/fsl_sai.c
@@ -354,13 +354,25 @@ static int fsl_sai_set_bclk(struct snd_soc_dai *dai, bool tx, u32 freq)
return -EINVAL;
}
- if ((tx && sai->synchronous[TX]) || (!tx && !sai->synchronous[RX])) {
+ /*
+ * 1) For Asynchronous mode, we must set RCR2 register for capture, and
+ * set TCR2 register for playback.
+ * 2) For Tx sync with Rx clock, we must set RCR2 register for playback
+ * and capture.
+ * 3) For Rx sync with Tx clock, we must set TCR2 register for playback
+ * and capture.
+ * 4) For Tx and Rx are both Synchronous with another SAI, we just
+ * ignore it.
+ */
+ if ((sai->synchronous[TX] && !sai->synchronous[RX]) ||
+ (!tx && !sai->synchronous[RX])) {
regmap_update_bits(sai->regmap, FSL_SAI_RCR2,
FSL_SAI_CR2_MSEL_MASK,
FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));
regmap_update_bits(sai->regmap, FSL_SAI_RCR2,
FSL_SAI_CR2_DIV_MASK, savediv - 1);
- } else {
+ } else if ((sai->synchronous[RX] && !sai->synchronous[TX]) ||
+ (tx && !sai->synchronous[TX])) {
regmap_update_bits(sai->regmap, FSL_SAI_TCR2,
FSL_SAI_CR2_MSEL_MASK,
FSL_SAI_CR2_MSEL(sai->mclk_id[tx]));
--
2.6.2
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