[alsa-devel] [PATCH v1 1/5] ASoC: rockchip: i2s: Support to set the divider clock API

[Mark Brown]

On Tue, Nov 03, 2015 at 09:33:54AM +0800, Caesar Wang wrote:
> In order to support more sample rates, add the divider clock api.
> 
> As the input source clock to the module is MCLK_I2S,
> and by the divider of the module, the clock generator generates
> SCLK and LRCK to transmitter and receiver.

Same thing as your other very similar patch: why does this feature
require set_clkdiv()?
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