[alsa-devel] [PATCH] ASoC: max98090: Simplify max98090_readable_register implementation

[Axel Lin]

2015-07-27 18:08 GMT+08:00 Jarkko Nikula <jarkko.nikula at linux.intel.com>:
> On 07/27/2015 04:39 AM, Axel Lin wrote:
>>
>> The readable registers are in consecutive ranges:
>>         0x01 ~ 0x03, 0x0D ~ 0xD1, 0xFF
>> So simplify the implementation by specifying a range of consecutive values
>> in a single case label.
>>
>> Signed-off-by: Axel Lin <axel.lin at ingics.com>
>> ---
>>   sound/soc/codecs/max98090.c | 71
>> ++-------------------------------------------
>>   1 file changed, 2 insertions(+), 69 deletions(-)
>>
> Reviewed-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>
> Tested-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>

Thanks.

>
> One minor comment below.
>
>> -       case M98090_REG_DMIC34_BIQUAD_BASE ...
>> M98090_REG_DMIC34_BIQUAD_BASE + 0x0E:
>> +       case M98090_REG_DEVICE_STATUS ... M98090_REG_INTERRUPT_S:
>> +       case M98090_REG_LINE_INPUT_CONFIG ... 0xD1:
>>         case M98090_REG_REVISION_ID:
>>                 return true;
>
>
> I'd have preserved that magic M98090_REG_DMIC34_BIQUAD_BASE + 0x0E here.
> Last register before 0xff is 0xbd in the specification,
> M98090_REG_DMIC34_BIQUAD_BASE is 0xc3 in the max98090.h so it seems to me
> that 0xc3 ~ 0xd1 are undocumented registers.

0xc3 ~ 0xd1 are undocumented registers for MAX98090, but it is documented
in MAX98091 datasheet (SECONDARY RECORD PATH BIQUAD COEFFICIENT REGISTERS).

Regards,
Axel