[alsa-devel] [PATCH V2] ASoC: sgtl5000: add delay before first I2C access
Fabio Estevam
festevam at gmail.com
Fri Jan 30 22:31:37 CET 2015
Hi Eric,
On Fri, Jan 30, 2015 at 7:07 PM, Eric Nelson
<eric.nelson at boundarydevices.com> wrote:
> To quote from section 1.3.1 of the data sheet:
> The SGTL5000 has an internal reset that is deasserted
> 8 SYS_MCLK cycles after all power rails have been brought
> up. After this time, communication can start
>
> ...
> 1.0uS represents 8 SYS_MCLK cycles at the minimum 8.0 MHz SYS_MCLK.
Small detail: Should be us instead of uS.
Reviewed-by: Fabio Estevam <fabio.estevam at freescale.com>
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