[alsa-devel] [PATCH 2/2] misc: sram: switch to ioremap_wc from ioremap

[Abhilash Kesavan]

Hi Tony,

On Mon, Jan 5, 2015 at 11:48 PM, Tony Lindgren <tony at atomide.com> wrote:
> * Abhilash Kesavan <kesavan.abhilash at gmail.com> [141217 04:37]:
>> Hi,
>>
>> On Thu, Dec 11, 2014 at 8:28 PM, Catalin Marinas
>> <catalin.marinas at arm.com> wrote:
>> > On Thu, Dec 11, 2014 at 11:40:46AM +0000, Philipp Zabel wrote:
>> >> Hi Will,
>> >>
>> >> Am Donnerstag, den 11.12.2014, 10:39 +0000 schrieb Will Deacon:
>> >> > On Thu, Dec 11, 2014 at 10:08:33AM +0000, Philipp Zabel wrote:
>> >> > > Hi Abhilash,
>> >> > >
>> >> > > Am Donnerstag, den 11.12.2014, 08:28 +0530 schrieb Abhilash Kesavan:
>> >> > > > Currently, the SRAM allocator returns device memory via ioremap.
>> >> > > > This causes issues on ARM64 when the internal SoC SRAM allocated by
>> >> > > > the generic sram driver is used for audio playback. The destination
>> >> > > > buffer address (which is ioremapped SRAM) is not 64-bit aligned for
>> >> > > > certain streams (e.g. 44.1k sampling rate). In such cases we get
>> >> > > > unhandled alignment faults. Use ioremap_wc in place of ioremap which
>> >> > > > gives us normal non-cacheable memory instead of device memory.
>> >> > >
>> >> > > Could this break the omap_bus_sync() implementation in
>> >> > > arch/arm/mach-omap2/omap4-common.c?
>> >> > >
>> >> > >     void omap_bus_sync(void)
>> >> > >     {
>> >> > >             if (dram_sync && sram_sync) {
>> >> > >                     writel_relaxed(readl_relaxed(dram_sync), dram_sync);
>> >> > >                     writel_relaxed(readl_relaxed(sram_sync), sram_sync);
>> >> > >                     isb();
>> >> > >             }
>> >> > >     }
>> >> > >
>> >> > > It is used in wmb() and omap_do_wfi() to drain interconnect write
>> >> > > buffers on omap4/5. If sram_sync is mapped with write-combining, could
>> >> > > the last write to sram_sync stay stuck in the write-combining buffer
>> >> > > until after the function returns?
>> >> >
>> >> > I think you have that issue anyway, since you can get an early write
>> >> > response even if you use ioremap. Does the write to sram_sync have
>> >> > side-effects that we need to wait for?
>> >>
>> >> [Added Tony Lindgren and Santosh Shilimkar to Cc:]
>> >> I don't know.
>> >
>> > In addition to Will's question, do you care about the access size?
>> > ioremap() returns Device memory which is bufferable (early
>> > acknowledgement) but it guarantees the access size. With write
>> > combining, you may get a different access size than requested.
>>
>> From the existing dts files, omap, imx, rockchip and exynos seem to be
>> the only users of the sram allocator code. I have tested this on
>> Exynos5420, Exynos5800 and Exynos7; there is no change in behavior
>> seen on these boards. Tested-by for other SoCs would be appreciated.
>
> Sorry for the delay, these seems to boot OK on omap4, so from that
> point of view:
>
> Tested-by: Tony Lindgren <tony at atomide.com>

Thanks a lot for testing this. If someone with imx and rockchip boards
could help test this out, then we could look to get this in.

Regards,
Abhilash