[alsa-devel] [PATCH 01/10] irqchip: irq-mips-gic: export gic_send_ipi
Jiang Liu
jiang.liu at linux.intel.com
Thu Aug 27 04:22:49 CEST 2015
On 2015/8/27 5:40, Thomas Gleixner wrote:
> But back to the IPIs. We need infrastructure and DT support to:
>
> 1) reserve an IPI
>
> 2) send an IPI
>
> 3) request/free an IPI
>
> #1 We have no infrastructure for that, but we definitely need one.
>
> We can look at the IPI as a single linux irq number which is
> replicated on all cpu cores. The replication can happen in hardware
> or by software, but that depends on the underlying root irq
> controller. How that is implemented does not matter for the
> reservation.
>
> The most flexible and platform independent solution would be to
> describe the IPI space as a seperate irq domain. In most cases this
> would be a hierarchical domain stacked on the root irq domain:
>
> [IPI-domain] --> [GIC-MIPS-domain]
>
> on x86 this would be:
>
> [IPI-domain] --> [vector-domain]
>
> That needs some change how the IPIs which are used by the kernel
> (rescheduling, function call ..) are set up, but we get a proper
> management and collision avoidance that way. Depending on the
> platform we could actually remove the whole IPI compile time
> reservation and hand out IPIs at boot time on demand and
> dynamically.
Hi Thomas,
Good point:) That will make the code more clear.
Thanks!
Gerry
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