[alsa-devel] [PATCH v2] ASoC: sgtl5000: Fix the cache handling

[Fabio Estevam]

Hi Lars-Peter,

On Fri, May 23, 2014 at 5:36 AM, Lars-Peter Clausen <lars at metafoo.de> wrote:
> [...]
>
>> @@ -1075,7 +1079,6 @@ static int sgtl5000_suspend(struct snd_soc_codec
>> *codec)
>>    */
>>   static int sgtl5000_restore_regs(struct snd_soc_codec *codec)
>>   {
>> -       u16 *cache = codec->reg_cache;
>>         u16 reg;
>>
>>         /* restore regular registers */
>> @@ -1089,12 +1092,12 @@ static int sgtl5000_restore_regs(struct
>> snd_soc_codec *codec)
>>                         reg == SGTL5000_CHIP_REF_CTRL)
>>                         continue;
>>
>> -               snd_soc_write(codec, reg, cache[reg]);
>> +               snd_soc_write(codec, reg, snd_soc_read(codec, reg));
>>         }
>>
>>         /* restore dap registers */
>>         for (reg = SGTL5000_DAP_REG_OFFSET; reg < SGTL5000_MAX_REG_OFFSET;
>> reg += 2)
>> -               snd_soc_write(codec, reg, cache[reg]);
>> +               snd_soc_write(codec, reg, snd_soc_read(codec, reg));
>>
>>         /*
>>          * restore these regs according to the power setting sequence in
>> @@ -1110,29 +1113,32 @@ static int sgtl5000_restore_regs(struct
>> snd_soc_codec *codec)
>>          *    prefer to resotre it after SGTL5000_CHIP_ANA_POWER restored
>>          */
>>         snd_soc_write(codec, SGTL5000_CHIP_LINREG_CTRL,
>> -                       cache[SGTL5000_CHIP_LINREG_CTRL]);
>> +                       snd_soc_read(codec, SGTL5000_CHIP_LINREG_CTRL));
>>
>>         snd_soc_write(codec, SGTL5000_CHIP_ANA_POWER,
>> -                       cache[SGTL5000_CHIP_ANA_POWER]);
>> +                       snd_soc_read(codec, SGTL5000_CHIP_ANA_POWER));
>>
>>         snd_soc_write(codec, SGTL5000_CHIP_CLK_CTRL,
>> -                       cache[SGTL5000_CHIP_CLK_CTRL]);
>> +                       snd_soc_read(codec, SGTL5000_CHIP_CLK_CTRL));
>>
>>         snd_soc_write(codec, SGTL5000_CHIP_REF_CTRL,
>> -                       cache[SGTL5000_CHIP_REF_CTRL]);
>> +                       snd_soc_read(codec, SGTL5000_CHIP_REF_CTRL));
>>
>>         snd_soc_write(codec, SGTL5000_CHIP_LINE_OUT_CTRL,
>> -                       cache[SGTL5000_CHIP_LINE_OUT_CTRL]);
>> +                       snd_soc_read(codec, SGTL5000_CHIP_LINE_OUT_CTRL));
>>         return 0;
>>   }
>>
>>   static int sgtl5000_resume(struct snd_soc_codec *codec)
>>   {
>> +       struct sgtl5000_priv *sgtl5000 = snd_soc_codec_get_drvdata(codec);
>>         /* Bring the codec back up to standby to enable regulators */
>>         sgtl5000_set_bias_level(codec, SND_SOC_BIAS_STANDBY);
>>
>>         /* Restore registers by cached in memory */
>>         sgtl5000_restore_regs(codec);
>> +
>> +       regcache_cache_only(sgtl5000->regmap, false);
>
>
> That doesn't make too much sense, if regmap is in cache only mode
> snd_soc_read() will read from the cache and snd_soc_write() will write to
> the cache and nothing else happens. So you read from the cache only to write
> the same value back.

I would appreciate some guidance here as I am not very familiar with
the caching details.

What would be the recommended approach in this case?