[alsa-devel] Sound issue in omap-twl4030

[Chaitral Purkar]

Hello,
I am working on enabling audio support on a customized board which is similar to zoom2. I am not able to hear any sound (with aplay) except two click/pop sounds (at start and at end).
I have ported Ubuntu kernel 3.7.10 on this board which has OMAP3530. On this board, I have TPS65930 chip which has a speaker connected over PreDriv.L and PreDriv.R.
I have incorporated the changes suggested on http://mailman.alsa-project.org/pipermail/alsa-devel/2012-December/058119.html  and updated sound/soc/omap/omap-twl4030.c,  sound/soc/codecs/twl4030.c and board-file under arch/arm/mach-omap2/.

When I try to play audio,

ubuntu at arm:~$ aplay -v test.wav
Playing WAVE 'test.wav' : Signed 16 bit Little Endian, Rate 44100 Hz, Stereo
ALSA <-> PulseAudio PCM I/O Plugin
Its setup is:
  stream       : PLAYBACK
  access       : RW_INTERLEAVED
  format       : S16_LE
  subformat    : STD
  channels     : 2
  rate         : 44100
  exact rate   : 44100 (44100/1)
  msbits       : 16
  buffer_size  : 22050
  period_size  : 5512
  period_time  : 125000
  tstamp_mode  : NONE
  period_step  : 1
  avail_min    : 5512
  period_event : 0
  start_threshold  : 22050
  stop_threshold   : 22050
  silence_threshold: 0
  silence_size : 0
  boundary     : 1445068800

ubuntu at arm:~$

However, no audio comes out from speaker.

dmesg shows following-

[ 1613.446319] omap-dma-engine omap-dma-engine: allocating channel for 33
[ 1613.502471] clock: dpll1_ck: set rate: locking rate to 600000000.
[ 1613.502502] clock: configuring DPLL dpll1_ck for low-power bypass
[ 1613.502563] clock: dpll1_ck transition to 'bypassed' in 0 loops
[ 1613.502624] clock: locking DPLL dpll1_ck
[ 1613.502777] clock: dpll1_ck transition to 'locked' in 94 loops
[ 1613.822082] clock: dpll1_ck: set rate: locking rate to 500000000.
[ 1613.822113] clock: configuring DPLL dpll1_ck for low-power bypass
[ 1613.822143] clock: dpll1_ck transition to 'bypassed' in 0 loops
[ 1613.822174] clock: locking DPLL dpll1_ck
[ 1613.822326] clock: dpll1_ck transition to 'locked' in 29 loops
[ 1614.126739] clock: dpll1_ck: set rate: locking rate to 250000000.
[ 1614.126770] clock: configuring DPLL dpll1_ck for low-power bypass
[ 1614.126800] clock: dpll1_ck transition to 'bypassed' in 0 loops
[ 1614.126831] clock: locking DPLL dpll1_ck
[ 1614.127014] clock: dpll1_ck transition to 'locked' in 34 loops
[ 1614.783264] clock: dpll1_ck: set rate: locking rate to 125000000.
[ 1614.783294] clock: configuring DPLL dpll1_ck for low-power bypass
[ 1614.783325] clock: dpll1_ck transition to 'bypassed' in 0 loops
[ 1614.783355] clock: locking DPLL dpll1_ck
[ 1614.783538] clock: dpll1_ck transition to 'locked' in 58 loops
[ 1617.033203] omap-dma-engine omap-dma-engine: freeing channel for 33

I have following struct defined in the board file and not using device tree support.
static struct omap_tw4030_pdata omap_twl4030_audio_data = {
    .voice_connected = false,
    .custom_routing = true,

    .has_predriv    = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
};

Also, I have set the amixer controls. Please find the file attached herewith.
However, I am still not able hear sound.
Can anybody please provide any pointer in this regard.
Thanks in advance.



Regards,
Chaitral Purkar

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