[alsa-devel] [PATCH v2] ALSA: hda - restore BCLK M/N values when resuming HSW/BDW display controller

Lin, Mengdong mengdong.lin at intel.com
Fri Jun 27 08:38:47 CEST 2014


Hi Takashi,

Sorry. This patch cannot handle the following case:
If only embedded DP is connected on boot, the gfx driver will turn off the display power well on boot case before the audio driver probes and request this power.
So the M/V values programmed by BIOS in EM4/5 registers will be lost at the very beginning. And so the audio driver will save invalid M/N values on suspend and restore these invalid values on resume. 
One phenomenon is: if HDMI or DP monitor is connected after boot, audio playback rate is ~20% faster than normal.
And I guess it's the patch cannot fix the Haswell issue https://bugzilla.kernel.org/show_bug.cgi?id=74861

There are two possible solutions:
(1) Follows Windows model: Windows, gfx driver notifies BIOS on LPSP (when only eDP is connected) exit and BIOS reprograms those EM4/5 registers.
   There is no such implementation in Linux gfx driver now. We need time to check the effort.

(2) Gfx driver notify audio driver on exiting LPSP and CDCLK value (by reading GPU registers), so audio driver can reprograms EM4/5 registers.
  The open source interface between audio/gfx driver is still not ready. Would an private API to get CDCLK from gfx driver will be a possible workaround atm?

Could you share your opinion on this issue?

Thanks
Mengdong

> -----Original Message-----
> From: Takashi Iwai [mailto:tiwai at suse.de]
> Sent: Thursday, June 26, 2014 9:47 PM

> > I'd just open-code a few read and write lines.
> 
> Thinking of this again, maybe it's better to keep the patch smaller at this
> stage, just concentrating on the fix.
> 
> We can get rid of ICH6 prefix later with a series of cleanup patches.
> 
> I'm going to take your rev2 patch then.
> 
> 
> thanks,
> 
> Takashi


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