[alsa-devel] r8a7790 only has audio when clock is forced on

[Violeta Menendez Gonzalez]

Hi!

On 06/05/14 07:05, Kuninori Morimoto wrote:
>
> Hi Ben
>
> # I misunderstood your point...
>
>> The result of our investigation is as follows:
>>
>> - The clock code correctly enables SSI(ALL) but the audio does not work
>> - If we force SSI(ALL) to be on all the time, we have working audio
>
> SSI(ALL) bit mean "this bit is always required for all SSI"
> If you want to use SSI0, then, you need to enable "SSI(ALL) + SSI0" bit
>

We have to force SSI(ALL) to stay always on on the DT with a special 
property, like this:
always-on = <0x00000020>;

we don't need to force SSI0 on, although it is necessary for audio that 
this clock is on too.

The code for mstp10 correctly enables SSI0 *and* SSI(ALL). But it only 
works when SSI(ALL) is forced on the DT.

When we do on the DT: always-on = <0x00000020>;
we have:
cpg_mstp_clock_endisable: index 5, enable 0
cpg_mstp_clock_endisable: index 5, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, value write in group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, enable 1
cpg_mstp_clock_endisable: index 5, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, value write in group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 15, enable 1
cpg_mstp_clock_endisable: index 15, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 15, value write in group->smstpcr 00027fc0
cpg_mstp_clock_endisable: index 15, enable 0
cpg_mstp_clock_endisable: index 15, value read from group->smstpcr 00027fc0
cpg_mstp_clock_endisable: index 15, value write in group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, enable 0
cpg_mstp_clock_endisable: index 5, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, value write in group->smstpcr 0002ffc0
and audio is working correctly.

If we do: always-on = <0x00000000>; (or not having the property at all)
then we have:
cpg_mstp_clock_endisable: index 5, enable 1
cpg_mstp_clock_endisable: index 5, value read from group->smstpcr 0002ffe0
cpg_mstp_clock_endisable: index 5, value write in group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 15, enable 1
cpg_mstp_clock_endisable: index 15, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 15, value write in group->smstpcr 00027fc0
cpg_mstp_clock_endisable: index 15, enable 0
cpg_mstp_clock_endisable: index 15, value read from group->smstpcr 00027fc0
cpg_mstp_clock_endisable: index 15, value write in group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, enable 0
cpg_mstp_clock_endisable: index 5, value read from group->smstpcr 0002ffc0
cpg_mstp_clock_endisable: index 5, value write in group->smstpcr 0002ffe0
and we don't have audio at all.

Where index 5 is SSI(ALL) and index 15 is SSI0.
We can observe that when we force SSI(ALL) on on the DT, then 
clock_disable is called for SSI(ALL) before it enables again.
But when we don't force SSI(ALL) to be on, then it only calls 
clock_enable, but the register data is the same.

This looks like the correct behaviour, but in one case we have audio, 
and in the other we don't.

I hope this clarifies the problem a bit more.

Thanks

-- 
Violeta Menéndez González	http://www.codethink.co.uk/
Software Engineer		Codethink - Providing Genius