[alsa-devel] [PATCH 1/2] regmap: cache: Fix regcache_sync_block for non-autoincrementing devices

[Jarkko Nikula]

Commit 75a5f89f635c ("regmap: cache: Write consecutive registers in a single
block write") expected that autoincrementing writes are supported if
hardware has a register format which can support raw writes.

This is not necessarily true and thus for instance rbtree sync can fail when
there is need to sync multiple consecutive registers but block write to
device fails due not supported autoincrementing writes.

Fix this by spliting raw block sync to series of single register writes for
devices that don't support autoincrementing writes.

Signed-off-by: Jarkko Nikula <jarkko.nikula at linux.intel.com>
---
I noticed this with Realtek RT5642 audio codec which didn't resume properly
since first block write having more data than for single register failed to
not acknowledged I2C write during regcache_sync(). Chip acknowledges device
address, register address and two data bytes for its word size registers but
next data byte is not which then causes aborted I2C transfer and aborted
register sync.
---
 drivers/base/regmap/regcache.c | 14 +++++++++++++-
 1 file changed, 13 insertions(+), 1 deletion(-)

diff --git a/drivers/base/regmap/regcache.c b/drivers/base/regmap/regcache.c
index 29b4128da0b0..54707e586ac8 100644
--- a/drivers/base/regmap/regcache.c
+++ b/drivers/base/regmap/regcache.c
@@ -629,6 +629,7 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
 {
 	size_t val_bytes = map->format.val_bytes;
 	int ret, count;
+	unsigned int i;
 
 	if (*data == NULL)
 		return 0;
@@ -640,7 +641,18 @@ static int regcache_sync_block_raw_flush(struct regmap *map, const void **data,
 
 	map->cache_bypass = 1;
 
-	ret = _regmap_raw_write(map, base, *data, count * val_bytes);
+	if (!map->use_single_rw) {
+		ret = _regmap_raw_write(map, base, *data, count * val_bytes);
+	} else {
+		for (i = 0; i < count; i++) {
+			ret = _regmap_raw_write(map,
+						base + (i * map->reg_stride),
+						*data + (i * val_bytes),
+						val_bytes);
+			if (ret != 0)
+				break;
+		}
+	}
 
 	map->cache_bypass = 0;
 
-- 
2.1.0