[alsa-devel] [PATCH 17/31] ASoC: tegra: call pm_runtime APIs around register accesses

[Mark Brown]

On Mon, Nov 18, 2013 at 03:38:36PM -0700, Stephen Warren wrote:

> 1) regcache_sync() doesn't mean "if the cache is dirty, flush the
> dirty registers to HW", but rather, "if the cache is dirty, write any
> registers that don't match HW defaults to HW". If the HW was in
> cache-only mode because simply because clocks were turned off but not
> power, then the register values were retained, and the current HW
> register values may not be "HW defaults", and you may in fact /need/
> to write a value to HW that matches the HW default, yet is different
> from the current retained register content.

OK, that's a potential problem in general...  Fortunately most of the
uses actually cut power.

> a) Make regmap creation read the initial HW state to use as HW
> defaults when the regmap is created. IIRC, this is done for some
> regmap configurations but not others. That said, this doesn't seem
> correct, since there's no guarantee that the HW state when the regmap
> is created /is/ the default HW state.

Right, this is why we don't initialise the cache by default.

> I think I still prefer option (c).

there's also the option of doing an explicit read on that register to
get it into the cache.  But yeah, like I say I'm not totally against
this and I did ack it already.
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