[alsa-devel] [RFC 16/23] ASoC: omap: mcbsp, mcpdm, dmic: raw read and write endian fix
Jarkko Nikula
jarkko.nikula at bitmer.com
Sat Nov 16 17:09:51 CET 2013
On 11/16/2013 02:01 AM, Taras Kondratiuk wrote:
> From: Victor Kamensky <victor.kamensky at linaro.org>
>
> All OMAP IP blocks expect LE data, but CPU may operate in BE mode.
> Need to use endian neutral functions to read/write h/w registers.
> I.e instead of __raw_read[lw] and __raw_write[lw] functions code
> need to use read[lw]_relaxed and write[lw]_relaxed functions.
> If the first simply reads/writes register, the second will byteswap
> it if host operates in BE mode.
>
> Changes are trivial sed like replacement of __raw_xxx functions
> with xxx_relaxed variant.
>
> Signed-off-by: Victor Kamensky <victor.kamensky at linaro.org>
> Signed-off-by: Taras Kondratiuk <taras.kondratiuk at linaro.org>
> ---
> sound/soc/omap/mcbsp.c | 12 ++++++------
> sound/soc/omap/omap-dmic.c | 4 ++--
> sound/soc/omap/omap-mcpdm.c | 4 ++--
> 3 files changed, 10 insertions(+), 10 deletions(-)
>
Looks ok to me by looking at the _relaxed definitions in
arch/arm/include/asm/io.h.
Acked-by: Jarkko Nikula <jarkko.nikula at bitmer.com>
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