[alsa-devel] [PATCH v2 RESEND 2/2] ASOC: tegra: fix AC97 clock handling

[Mark Brown]

On Tue, Dec 17, 2013 at 03:20:35PM -0700, Stephen Warren wrote:

> The Tegra clocking architecture has a shared audio PLL that provides
> clocks to the various IO controllers (I2S, AC'97, S/PDIF). In order to
> allow multiple IO controllers to be in use at once, a single SW entity
> has to manage the clocks, so that it can configure the audio PLL, rather
> than having each individual IO controller attempt to assert ownership on
> the shared resource. The centralized PLL management needs to switch the
> PLL rate between 2 different values for 48-/44.1KHz-based audio for
> example, and deny requests to switch if already-active audio is running
> at the other rate.

> So yes, I think doing this all in the machine driver is the best thing.

How does doing this in the machine driver help here?  The machine driver
isn't going to be any more coordinated with other machine drivers than
the controller is.

Note also that AC'97 will essentially force a constant always on clock
if you want to stay in spec which I imagine any system using AC'97 with
Tegra would want to do given that it's not exactly cutting edge...
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