[alsa-devel] [PATCH 2/4] Add macros for fixed value related to AMDTP
Takashi Sakamoto
o-takashi at sakamocchi.jp
Mon Apr 29 11:47:19 CEST 2013
This patch adds some macros for fixed value related to AMDTP
in IEC 61883-6. These macros will be used by followed patches.
This patch also replace existed fixed value to the corresponding macro.
Signed-off-by: Takashi Sakamoto <o-takashi at sakamocchi.jp>
---
sound/firewire/amdtp.c | 20 +++++++++++++++-----
1 file changed, 15 insertions(+), 5 deletions(-)
diff --git a/sound/firewire/amdtp.c b/sound/firewire/amdtp.c
index d6d1abb..e3947ad 100644
--- a/sound/firewire/amdtp.c
+++ b/sound/firewire/amdtp.c
@@ -20,12 +20,22 @@
#define TRANSFER_DELAY_TICKS 0x2e00 /* 479.17 µs */
+#define ISO_DATA_LENGTH_SHIFT 16
#define TAG_CIP 1
-
-#define CIP_EOH (1u << 31)
-#define CIP_FMT_AM (0x10 << 24)
-#define AMDTP_FDF_AM824 (0 << 19)
+#define CIP_EOH_MASK 0x80000000
+#define CIP_EOH_SHIFT 31
+#define CIP_EOH (1u << CIP_EOH_SHIFT)
+#define CIP_FMT_MASK 0x3F000000
+#define CIP_FMT_SHIFT 24
+#define CIP_FMT_AM (0x10 << CIP_FMT_SHIFT)
+#define AMDTP_FDF_MASK 0x00FF0000
#define AMDTP_FDF_SFC_SHIFT 16
+#define AMDTP_FDF_NO_DATA (0xFF << AMDTP_FDF_SFC_SHIFT)
+/* only "Clock-based rate controll mode" is supported */
+#define AMDTP_FDF_AM824 (0 << (AMDTP_FDF_SFC_SHIFT + 3))
+#define AMDTP_DBS_MASK 0x00FF0000
+#define AMDTP_DBS_SHIFT 16
+#define AMDTP_DBC_MASK 0x000000FF
/* TODO: make these configurable */
#define INTERRUPT_INTERVAL 16
@@ -349,7 +359,7 @@ static void queue_out_packet(struct amdtp_stream *s, unsigned int cycle)
buffer = s->buffer.packets[index].buffer;
buffer[0] = cpu_to_be32(ACCESS_ONCE(s->source_node_id_field) |
- (s->data_block_quadlets << 16) |
+ (s->data_block_quadlets << AMDTP_DBS_SHIFT) |
s->data_block_counter);
buffer[1] = cpu_to_be32(CIP_EOH | CIP_FMT_AM | AMDTP_FDF_AM824 |
(s->sfc << AMDTP_FDF_SFC_SHIFT) | syt);
--
1.7.10.4
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